Back to results
US 8,476,686 B2Granted
Memory device and method for making same
AssigneeInfineon Technologies AG
InventorArmin Tilke
Life of this patent
Estimating the term…
Abstract
An embodiment relates to a memory cell comprising a programmable resistance memory element electrically coupled to a heterojunction bipolar transistor.
Claims26
A memory array, comprising:
- a plurality of memory cells arranged along a first direction and a second direction, each of said cells comprising a programmable resistance memory element electrically coupled to a heterojunction bipolar transistor, said heterojunction bipolar transistor of each of said memory cells being an access device, said heterojunction bipolar transistor of each of said memory cells including a collector region, said collector regions being spaced apart from each other along said first direction and along said second direction.
A memory array, comprising:
- a plurality of memory cells, each of said cells comprising a programmable resistance memory element electrically coupled to a heterojunction bipolar transistor, said heterojunction bipolar transistor of each of said memory cells being an access device, said heterojunction bipolar transistor of each of said memory cells including a collector region, each of said collector regions being spaced apart from all other collector regions of said memory array.
Dependencies are inferred from the claim text.