Display device
AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorHiroki Adachi
Life of this patent
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Abstract
The present invention provides a display device. The display device comprises first and second wirings, first and second transistors, an insulating film over the first and second transistors, a first electrode over the insulating film, a light emitting layer over the first electrode, and a second electrode over the light emitting layer. The gate electrode of the first transistor is formed in a different layer from the first wiring. One of a source electrode and a drain electrode of the first transistor is electrically connected to a gate electrode of the second transistor. The first wiring is parallel to the second wiring.
Claims14
A display device comprising:
- a substrate;
- a first wiring over the substrate;
- a second wiring over the substrate;
- a first transistor over the substrate, a gate electrode of the first transistor being electrically connected to the first wiring;
- a second transistor over the substrate, one of a source electrode and a drain electrode of the second transistor being electrically connected to the second wiring;
- an insulating film over the first transistor and the second transistor;
- a first electrode over the insulating film;
- a light emitting layer over the first electrode;
- and
- a second electrode over the light emitting layer,
- wherein the gate electrode of the first transistor is formed in a different layer from the first wiring,
- wherein one of a source electrode and a drain electrode of the first transistor is electrically connected to a gate electrode of the second transistor, and
- wherein the first wiring is parallel to the second wiring.
A display device comprising:
- a first substrate;
- a first wiring over the first substrate;
- a second wiring over the first substrate;
- a first transistor over the first substrate, a gate electrode of the first transistor being electrically connected to the first wiring;
- a second transistor over the first substrate, one of a source electrode and a drain electrode of the second transistor being electrically connected to the second wiring;
- an insulating film over the first transistor and the second transistor;
- a first electrode over the insulating film;
- a light emitting layer over the first electrode;
- a second electrode over the light emitting layer;
- a second substrate over the second electrode;
- a first sealing material interposed between the first substrate and the second substrate, the first sealing material being disposed along peripheries of the first and second substrates;
- and
- a second sealing material outside of and along the first sealing material,
- wherein one of a source electrode and a drain electrode of the first transistor is electrically connected to a gate electrode of the second transistor, and
- wherein the first wiring is parallel to the second wiring.
A display device comprising:
- a first substrate;
- a first wiring over the first substrate;
- a second wiring over the first substrate;
- a first transistor over the first substrate, a gate electrode of the first transistor being electrically connected to the first wiring;
- a second transistor over the first substrate, one of a source electrode and a drain electrode of the second transistor being electrically connected to the second wiring;
- an insulating film over the first transistor and the second transistor;
- a first electrode over the insulating film;
- a light emitting layer over the first electrode;
- a second electrode over the light emitting layer;
- a second substrate over the second electrode;
- a first sealing material interposed between the first substrate and the second substrate, the first sealing material being disposed along peripheries of the first and second substrates;
- and
- a second sealing material outside of and along the first sealing material,
- wherein the gate electrode of the first transistor is formed in a different layer from the first wiring,
- wherein one of a source electrode and a drain electrode of the first transistor is electrically connected to a gate electrode of the second transistor, and
- wherein the first wiring is parallel to the second wiring.
Dependencies are inferred from the claim text.