Method for high volume e-beam lithography

A method of patterning a substrate, the method comprising:

• receiving an integrated circuit (IC) design layout data comprising pattern layers having a polygon and a forbidden pattern;
• modifying the polygon and the forbidden pattern using an electron proximity correction (EPC) technique;
• stripping the modified polygon into subfields, wherein the stripping the modified polygon includes:
• finding a forbidden pattern as a reference layer,
• forming an OR layer or a NOT layer with the reference layer, and
• stitching the modified polygon by avoiding stitching the forbidden pattern of the OR layer or the NOT layer;
• converting the stripped polygon to an electron beam writer format data;
• and
• writing the electron beam writer formatted polygon onto a substrate by an electron beam writer.

A method of patterning a substrate, the method comprising:

• receiving an integrated circuit (IC) design layout data comprising pattern layers having a polygon and a forbidden pattern;
• modifying the polygon and the forbidden pattern using an electron proximity correction (EPC) technique;
• stripping the modified polygon into subfields, wherein the striping the modified polygon includes:
• finding the forbidden pattern as a reference layer, and
• stitching the modified polygon by avoiding stitching the forbidden pattern of the reference layer, wherein the avoiding stitching the forbidden pattern of the reference layer includes moving a stitching line away from a stripping boundary line;
• converting the stripped polygon to an electron beam writer format data;
• and
• writing the electron beam writer formatted polygon onto a substrate by an electron beam writer.