Nonvolatile semiconductor memory device and method for manufacturing the same

A nonvolatile semiconductor memory device, comprising:

• a first stacked body including a plurality of first electrode films stacked in a first direction and a first inter-electrode insulating film provided between the plurality of first electrode films;
• a first conductive pillar piercing the first stacked body in the first direction;
• a first pillar inner insulating film provided between the first conductive pillar and the first electrode films, the first pillar inner insulating film being provided around a side face of the first conductive pillar;
• a first semiconductor pillar provided between the first pillar inner insulating film and the first electrode films to pierce the first stacked body along the first direction, the first semiconductor pillar being provided around a side face of the first pillar inner insulating film;
• a first pillar intermediate insulating film provided between the first semiconductor pillar and the first electrode films, the first pillar intermediate insulating film being provided around a side face of the first semiconductor pillar;
• a first pillar memory layer provided between the first pillar intermediate insulating film and the first electrode films, the first pillar memory layer being provided around a side face of the first pillar intermediate insulating film;
• a first pillar outer insulating film provided between the first pillar memory layer and the first electrode films, the first pillar outer insulating film being provided around a side face of the first pillar memory layer;
• a second stacked body, a second direction from the first stacked body toward the second stacked body intersecting the first direction, the second stacked body including a plurality of second electrode films stacked in the first direction and a second inter-electrode insulating film provided between the plurality of second electrode films;
• a second conductive pillar piercing the second stacked body in the first direction;
• a second pillar inner insulating film provided between the second conductive pillar and the second electrode films, the second pillar inner insulating film being provided around a side face of the second conductive pillar;
• a second semiconductor pillar provided between the second pillar inner insulating film and the second electrode films to pierce the second stacked body in the first direction, the second semiconductor pillar being provided around a side face of the second pillar inner insulating film;
• a second pillar intermediate insulating film provided between the second semiconductor pillar and the second electrode films, the second pillar intermediate insulating film being provided around a side face of the second semiconductor pillar;
• a second pillar memory layer provided between the second pillar intermediate insulating film and the second electrode films, the second pillar memory layer being provided around a side face of the second pillar intermediate insulating film;
• a second pillar outer insulating film provided between the second pillar memory layer and the second electrode films, the second pillar outer insulating film being provided around a side face of the second pillar memory layer;
• a semiconductor connection portion electrically connecting one end of the first semiconductor pillar to one end of the second semiconductor pillar and provided between the first semiconductor pillar and the second semiconductor pillar;
• and
• a core connection portion electrically connecting one end of the first conductive pillar proximate to the one end of the first semiconductor pillar to one end of the second conductive pillar proximate to the one end of the second semiconductor pillar.