US 8,441,850 B2 · Magnetic random access memory (MRAM) layout with uniform pattern

Abstract

A large scale memory array includes a uniform pattern of uniformly sized dummy bit cells and active bit cells. Sub-arrays within the large scale memory array are separated by the dummy bit cells. Signal distribution circuitry is formed with a width or height corresponding to the width or height of the dummy bit cells so that the signal distribution circuitry occupies the same footprint as the dummy bit cells without disrupting the uniform pattern across the large scale array. Edge dummy cells of a similar size or larger than the standard size bit cells may be placed around the edge of the large scale array to further reduce pattern loading affects.

Claims25

Dependent claims

A memory array, comprising:

a pattern of adjacent uniformly sized bit cells;
and
signal distribution circuitry configured to have an area having a footprint and edges coinciding with a footprint and edges of a number of the bit cells.

Dependencies are inferred from the claim text.

Facts

Application

12/901,074Filed 8 Oct 2010

Published

US 2012/0087184 A112 Apr 2012

Granted

14 May 2013

Term ends

Not estimatedThe source records don’t support an estimate.

Classification8 codes

G11C 5/025
Disposition of storage elements, e.g. in the form of a matrix array: geometric lay-out considerations of storage- and peripheral-blocks in a…
G11C 5/08
Arrangements for interconnecting storage elements electrically, e.g. by wiring: for interconnecting magnetic elements, e.g. toroidal cores
G11C 11/165
Using elements in which the storage effect is based on magnetic spin effect: auxiliary circuits
H10D 89/10
Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00: integrated device layouts

Magnetic random access memory (MRAM) layout with uniform pattern

Life of this patent

Magnetic random access memory (MRAM) layout with uniform pattern

Life of this patent

Abstract

Claims25