Methods and apparatus for single testing stimulus
AssigneeAltera Corporation
InventorsGary Yu-Kwun Kwan, Jimmy Soon Yoong Yeap
Life of this patent
Estimating the term…
Abstract
Methods and apparatus useful for improving the performance of testing and diagnostic operations on user circuit designs potentially across multiple phases of the development lifecycle and across multiple implementation technologies are described. As one example, a single testing and diagnostic stimulus source can variously provide test pattern data to different potential instantiations of the user circuit design by supporting and selectively utilizing a number of DUT-facing communication channels.
Claims18
A method for testing an integrated circuit design, comprising:
- using a computer and thereby:
- accessing a test script for an IC device wherein said test script indicates a data pattern;
- determining whether a testing operation for the IC device targets a hardware implementation or a computer simulation;
- selectively sending said data pattern using a first communication channel or a second communication channel based on said determining.
A system for testing an integrated circuit under development, comprising:
- a CPU;
- a communication circuit coupled to said CPU and couplable to an IC device under test;
- and
- digital data storage, including:
- first program code, which when executed by the CPU, interfaces with a source of user input, whereby information about a data pattern for testing an IC design is accessed and wherein said IC design includes a diagnostics communications block;
- second program code, which when executed by the CPU, interfaces with a first communication channel for communicating with said diagnostics communications block during simulation of said IC design;
- third program code, which when executed by the CPU, interfaces with a second communication channel for communicating with said diagnostics communication block during hardware implementation of said IC design;
- and
- fourth program code, which when executed by the CPU, sends said data pattern using one of said second program code or said third program code based on a determination of whether a computer simulation or a hardware implementation of said IC design is targeted.
A non-transitory computer readable medium for IC design development diagnostics, comprising:
- first interface computer code, which when executed by a computer, interfaces with a first communication channel for communicating with a diagnostics communication block of an IC design under test;
- second interface computer code, which when executed by a computer, interfaces with a second communication channel for communicating with said diagnostics communication block;
- and
- diagnostic console computer code, which when executed by a computer, accesses a test data pattern and selectively sending said test data pattern by said first interface computer code or said second interface computer code based on a determination of whether said IC design is under test as a simulation device or as a hardware instance.
Dependencies are inferred from the claim text.