System-level method for reducing power supply noise in an electronic system

A non-transitory computer-readable medium, which when executed, enables a computer system to implement a method of reducing power supply noise within an electronic system, the method comprising:

• designing a model of the electronic system, the model including a circuit representation of an integrated circuit (IC), a package, and a printed circuit board (PCB) connected by a plurality of power delivery networks (PDN);
• defining a voltage compression limit for each PDN of the electronic system;
• determining a voltage compression for each PDN of the electronic system during a plurality of switching events, wherein the plurality of switching events includes:
• a single switching event after a period of no event, multiple switching events, and a switching event that excites resonance within the electronic system;
• comparing the voltage compression of each PDN of the electronic system to the voltage compression limit for each switching event;
• and
• in response to the voltage compression of a PDN of the electronic system exceeding the limit for the PDN, modifying the electronic system to reduce the voltage compression below the limit for the PDN.

A computer-implemented method of reducing power supply noise within an integrated circuit (IC), the method comprising:

• designing a model of the electronic system, the model including a circuit representation of an integrated circuit (IC), a package, and a printed circuit board (PCB) connected by a plurality of power delivery networks (PDN);
• defining a voltage compression limit for each PDN of the electronic system;
• determining a voltage compression for each PDN of the electronic system during a plurality of switching events, wherein the plurality of switching events includes:
• a single switching event after a period of no event, multiple switching events, and a switching event that excites resonance within the electronic system;
• comparing the voltage compression of each PDN of the electronic system to the voltage compression limit for each switching event;
• determining, based on the comparing, which of the plurality of switching events is a dominant switching event for each PDN of the electronic system, wherein the dominant switching event is a switching event with the most voltage compression;
• and
• in response to the voltage compression of each PDN of the electronic system exceeding the limit for the PDN during the dominant switching event, modifying the electronic system to reduce the voltage compression below the limit for the PDN.