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US 8,429,507 B1Granted
Device and method for detecting and correcting errors in a data stream
AssigneeMarvell International Ltd.
InventorsPeter Kou, Zining Wu
Life of this patent
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Abstract
A device for detecting and correcting errors in a data stream. For example, a device for detecting and correcting errors in a data stream including identifiers for a track address or identifiers for encoded words in a wireless transmission. The devices employ a class of error correction codes to, for instance, encode track addresses on a surface of a data storage medium. The encoding modifies natural track addresses so that the difference between bit sequences in adjacent track addresses is constant while simultaneously enabling both error detection and error correction, thereby enabling more accurate head positioning in a data storage device, in one embodiment.
Claims20
A device comprising:
- an output configured to output encoded words, wherein
- each consecutive pair of the encoded words comprises a first encoded word and a second encoded word,
- for each of the consecutive pairs of the encoded words, the first encoded word has a predetermined number of bits with different values than bits in the second encoded word,
- each of the encoded words has an identifier,
- the identifiers of the encoded words are (i) binary numbers, and (ii) Gray code encoded, and
- each of the binary numbers is represented as {d1, d2, . . . dn−1, dn};
- and
- a processing circuit configured to (i) process the encoded words to enable a correction of at least one bit error in the encoded words, (ii) encode the identifiers with a cyclic code, and (iii) derive the cyclic code by listing cyclic code words of a predetermined weight in a matrix G′, wherein the matrix G′ includes A rows and n columns, where A is a number of the cyclic code words with the predetermined weight, and n is an integer.
5 more elements
A device comprising:
- an output configured to output encoded words, wherein
- each consecutive pair of the encoded words comprises a first encoded word and a second encoded word,
- for each of the consecutive pairs of the encoded words, the first encoded word has a predetermined number of bits with different values than bits in the second encoded word,
- each of the encoded words has an identifier,
- the identifiers of the encoded words are (i) binary numbers, and (ii) Gray code encoded, and
- each of the binary numbers is represented as {d1, d2, . . . dn−1, dn};
- and
- a processing circuit configured to process the encoded words to enable a correction of at least one bit error in the encoded words,
- wherein the encoded words include a predetermined number of parity bits to enable the correction of the at least one bit error, and
- wherein the processing circuit is configured to check the parity bits using at least one of a look up table, a logic function, or a logic circuit.
7 more elements
A device comprising:
- output means for outputting encoded words, wherein
- each consecutive pair of the encoded words comprises a first encoded word and a second encoded word,
- for each of the consecutive pairs of the encoded words, the first encoded word has a predetermined number of bits with different values than bits in the second encoded word,
- each of the encoded words has an identifier,
- the identifiers of the encoded words are (i) binary numbers, and (ii) Gray code encoded, and
- each of the binary numbers is represented as {d1, d2, . . . dn−1, dn};
- processing means for processing the encoded words to enable a correction of at least one bit error in the encoded words;
- and
- encoding means for (i) cyclic code encoding the identifiers, and (ii) listing cyclic code words of a predetermined weight in a matrix G′, wherein the matrix G′ includes A rows and n columns, where A equals a number of the cyclic code words with the predetermined weight, and n is an integer.
6 more elements
A method comprising:
- outputting encoded words, wherein
- each consecutive pair of the encoded words comprises a first encoded word and a second encoded word,
- for each of the consecutive pairs of the encoded words, the first encoded word has a predetermined number of bits with different values than bits in the second encoded word,
- each of the encoded words has an identifier,
- the identifiers of the encoded words are (i) binary numbers, and (ii) Gray code encoded, and
- each of the binary numbers is represented as {d1, d2, . . . dn−1, dn};
- processing the encoded words to enable a correction of at least one bit error in the encoded words;
- encoding the identifiers with a cyclic code;
- and
- deriving the cyclic code by listing cyclic code words of a predetermined weight in a matrix G′, wherein the matrix G′ includes A rows and n columns, where A is a number of the cyclic code words with the predetermined weight and n is an integer.
7 more elements
Dependencies are inferred from the claim text.