Methods and systems for first occurence debugging
AssigneeRed Hat, Inc.
InventorUlrich Drepper
Life of this patent
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Abstract
An embodiment relates generally to an apparatus for debugging. The apparatus includes a memory configured to store data and an arithmetic logic unit configured to perform logical and arithmetic operations. The apparatus also includes a control unit configured to interface with the memory and arithmetic logic unit and to decode instructions. The control unit is configured to write a data state designated to be overwritten by a currently executing instruction to a buffer allocated in the memory in response to a trace debug flag being set.
Claims20
An apparatus comprising:
- a memory to store data;
- an arithmetic logic unit to perform logical and arithmetic operations;
- and
- a control unit, coupled to the memory and the arithmetic logic unit, the control unit to decode instructions and to write a current data state to a buffer allocated in the memory when the current data state will be overwritten by a currently executing instruction, wherein the current data state to be overwritten is associated with a timestamp and an instruction address.
A method comprising:
- determining whether a currently executing instruction changes a current data state in a central processing unit;
- and
- writing the current data state to a buffer of the central processing unit when the currently executing instruction is to overwrite the current data state, wherein the buffer is accessible by a debugger program and wherein the current data state to be overwritten is associated with a timestamp and an instruction address.
A non-transitory computer readable medium with instructions stored thereon, which when executed by a processor, cause the processor to perform operations comprising:
- determining whether a currently executing instruction changes a current data state in the processor;
- and
- writing the current data state to a buffer of the processor when the currently executing instruction is to overwrite the current data state, wherein the buffer is accessible by a debugger program and wherein the current data state to be overwritten is associated with a timestamp and an instruction address.
Dependencies are inferred from the claim text.