Method and apparatus for emulating byte wise programmable functionality into sector wise erasable memory
AssigneeDialog Semiconductor GmbH
InventorSteven Frederik Leussink
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AssigneeDialog Semiconductor GmbH
InventorSteven Frederik Leussink
Estimating the term…
A method and system for emulating a byte-wise programmable memory in a sector-wise erasable memory, where emulating a byte-wise programmable memory in a sector-wise erasable memory is based on dividing the sector-wise erasable memory in a plurality of sectors, dividing each of the sectors into several memory locations suitable to store containers, with each container having a header and a payload portion, and storing a data value relating to an application in the payload portion of one of the containers and header information identifying the application in the header in an available container. The containers can be block containers, and the data portion can have two or more payload values. The storing action can be performed in such a way that the two or more payload values in the payload portion together uniquely represent the data value.
A method of emulating a byte-wise programmable memory in a sector-wise erasable memory comprising:
A method of emulating a byte-wise programmable memory in a sector-wise erasable memory, comprising:
A system comprising:
Dependencies are inferred from the claim text.
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Programming or data input circuits: external programming circuits, e.g. EPROM programmers; In-circuit programming or reprogramming; EPROM emulators
Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory: in block erasable memory, e.g. flash memory
Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers: data managing, e.g. manipulating data before…
Static stores
About 4 years 5 months of term left · ends 18 Mar 2031 (estimated)
This application claims priority under 35 U.S.C. 119(a) to European Application No. 09175829.2, entitled “METHOD AND APPARATUS FOR EMULATING BYTE WISE PROGRAMMABLE FUNCTIONALITY INTO SECTOR WISE ERASABLE MEMORY,” filed Nov. 12, 2009, and which application is herein incorporated by reference.
The present invention relates to an apparatus and method for emulating a byte wise programmable functionality into a sector wise erasable memory such as a FLASH memory.
Many electronic devices have non-volatile memory connected to a processor to store data. The way data can be stored varies for different non-volatile memories. For instance, EEPROM memories typically allow byte wise programming. A single byte can be erased and reprogrammed. FLASH memories typically allow sector wise programming. In that case, a sector with a minimum sector size (typically 4 kB) must be erased before any single byte can be programmed in the sector. One can not erase and/or modify a previously written single byte in the sector within such (FLASH) memory. In order to modify a single byte, i.e. changing at least one bit from said signal byte from a logical ‘0’ to a logical ‘1’, the entire sector must be read from the (FLASH) memory and stored in a local, other memory (usually RAM) first. After that, the sector is erased in the FLASH memory. The byte that needs to be written is modified in the locally stored sector in the other memory and the entire sector in the FLASH memory is reprogrammed, i.e., the modified sector is transferred from the local other memory to the FLASH memory. So, in a FLASH memory one can only write a single byte to a memory location which has first been erased, and the act of erasing is performed sector wise. In other words, during an erase operation, all bits of a sector of a sector-wise erasable memory are set in an erased state, and during a storing operation one or more bits could only be changed from the erased state to programmed state.
The invention will be explained in detail with reference to some drawings that are only intended to show embodiments of the invention and not to limit the scope. The scope of the invention is defined in the annexed claims and by its technical equivalents.
FIG. 1 is a prior art example of emulating an EEPROM memory into a FLASH memory.
FIG. 2 is a prior art example of a FLASH memory organization.
In FIG. 5 and following, the same reference numbers as shown in FIGS. 1 and 2 refer to the same features.
FIG. 5 illustrates a proposed way of organizing the memory. It is assumed that a data value could be represented by eight bits or a byte. Each data value that would have been stored in the EEPROM memory 4 is represented by a block container 35, consisting of a block information portion (or header) 33 and a payload portion 34. In the prior art systems (FIG. 2) a certain data value of a byte in the EEPROM memory 4 corresponds with the data value of the data 14 in the corresponding container 15 in the FLASH memory 3. In the block container 35, however, every block container has two or more payload bytes (=8 Bits) (or, more generally, two or more payload parts) for storing data. Other possible embodiments of payload parts are: nibble (WL=4 Bits), word (WL=16 Bits), longword/doubleword (WL=32 Bits), quadword (WL=64 Bits) octaword (WL=128 Bits). In principle, a payload part could be in the form of WL-bits, wherein WL is the length in bits needed to represent at least all possible data values. In an advantageous embodiment, the payload part has a length of P-bits which corresponds to the number of bits necessary to represent the data value to be stored in and represented by the payload portion 34. The continuous part of memory space allocated for a payload portion 34 has a length of M-bits, wherein M is a multiple of the length of P-bits of a payload part. Moreover, as will be explained in detail below, in the solution according to the invention a data value represented by a byte value to be stored is not stored itself, but is equal to the output of a function which has the payload portion 34 as an input of said function. In other words, the payload portion 34 represents the value of the data value to be stored in a predetermined and unique way. This function that is to be used to derive the byte value representing the data value to be stored from the payload portion 34 can be a variety of functions such as SUM, EXOR, XOR, AND, and any types of combination thereof. However, the SUM function is preferred.
The prior art example has two bytes in the address portion 13 and one byte in the data portion 14 per container 15, yielding 1365 containers per 4 kB sector 16. This means a single byte can be written to the 4 kB sector a total of 1365 times.