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US 8,429,335 B2Granted
Memory device and operation method to selectively invert data
AssigneeMacronix International Co., Ltd.
InventorsChung-Kuang Chen, Han-Sung Chen, Chun-Hsiung Hung
Life of this patent
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Abstract
Provided is a MLC (Multi-level cell) memory device, comprising: a memory array, including a plurality of groups each storing a plurality of bits; and an inverse bit storage section, storing a first inverse bit data including a plurality of inverse bits, the plurality of bits in the same group in the memory array being related to a respective inverse bit.
Claims18
A MLC (Multi-level cell) memory device, comprising:
- a memory array, including a plurality of groups each storing a plurality of bits;
- an inverse bit storage section, storing a first inverse bit data including a plurality of inverse bits, the plurality of bits in the same group in the memory array being related to a respective inverse bit;
- and
- a controller, coupled to the memory array and the inverse bit storage section for receiving an original data and outputting a first input data to the memory array,
- if the controller determines that a first threshold-voltage distribution of the original data is over a threshold situation, the controller generates the first input data by inverting bit values of a first portion of the original data but not inverting bit values of a second portion of the original data, so that the first input data and the original data have different threshold-voltage distribution;
- if the controller determines that a second threshold-voltage distribution of the original data is over the threshold situation, the controller generates the first input data by inverting the bit values of the first portion of the original data and the bit values of the second portion of the original data, so that the first input data and the original data have different threshold-voltage distribution;
- if the controller determines that a third threshold-voltage distribution of the original data is over the threshold situation, the controller generates the first input data by inverting the bit values of the second portion of the original data but not inverting the bit values of the first portion of the original data, so that the first input data and the original data have different threshold-voltage distribution;
- and
- if the controller determines that a fourth threshold-voltage distribution is over the threshold situation, the controller generates the first input data by not inverting the bit values of the original data.
6 more elements
An operation method for a MLC (multi-level cell) memory device, the MLC memory device comprising a memory array, the operation method comprising steps of:
- receiving an original data;
- determining whether to invert bit values of the original data into a first input data;
- if it is determined that a first threshold-voltage distribution of the original data is over a threshold situation, generating the first input data by inverting bit values of a first portion of the original data but not inverting bit values of a second portion of the original data, so that the first input data and the original data have different threshold-voltage distribution;
- if it is determined that a second threshold-voltage distribution of the original data is over the threshold situation, generating the first input data by inverting the bit values of the first portion of the original data and the bit values of the second portion of the original data, so that the first input data and the original data have different threshold-voltage distribution;
- if it is determined that a third threshold-voltage distribution of the original data is over the threshold situation, generating the first input data by inverting the bit values of the second portion of the original data but not inverting the bit values of the first portion of the original data, so that the first input data and the original data have different threshold-voltage distribution;
- and if it is determined that a fourth threshold-voltage distribution is over the threshold situation, generating the first input data by not inverting the bit values of the original data;
- generating a first inverse bit data based on the determination, the first inverse bit data indicating whether the bit values of the original data is inverted into the first input data or not, the first inverse bit data including a plurality of inverse bits;
- and
- storing the first input data and the first inverse bit data into the memory device.
6 more elements
Dependencies are inferred from the claim text.