Testing method and computer device and computer testing system using thereof

A computer device, comprising:

• a central processing unit (CPU) having an operation clock signal;
• and
• a computer readable medium, wherein the CPU reads the computer readable medium to execute a testing program to carry out an accuracy testing operation on a system time signal of the computer device under test, and the testing program comprises instructions, which when executed by the CPU, cause the CPU to:
• respectively record a first clock cycle parameter and a second clock cycle parameter of the operation clock signal in response to a first triggering edge and a second triggering edge of an external reference time signal;
• obtain a reference clock cycle parameter according to the first and second clock cycle parameters, wherein the reference clock cycle parameter indicates cycle times of triggering the operation clock signal between the first and second triggering edges;
• respectively record a third clock cycle parameter and a fourth clock cycle parameter of the operation clock signal in response to a third triggering edge and a fourth triggering edge triggered by the system time signal;
• obtain a to-be-measured clock cycle parameter according to the third and fourth clock cycle parameters, wherein the to-be-measured clock cycle parameter indicates cycle times of triggering the operation clock signal between the third and fourth triggering edges;
• and
• obtain error information of the system time signal according to the to-be-measured clock cycle parameter and the reference clock cycle parameter.

A testing method used in a computer device under test to carry out an accuracy testing operation on a system time signal of the computer device under test, the computer device under test comprising a central processing unit (CPU), the CPU having an operation clock signal, the testing method comprising the steps of:

• respectively recording a first clock cycle parameter and a second clock cycle parameter of the operation clock signal in response to a first triggering edge and a second triggering edge triggered by an external reference time signal provided by a test machine;
• obtaining a reference clock cycle parameter according to the first and second clock cycle parameters, wherein the reference clock cycle parameter indicates cycle times of triggering the operation clock signal between the first and second triggering edges;
• respectively recording a third clock cycle parameter and a fourth clock cycle parameter of the operation clock signal in response to a third triggering edge and a fourth triggering edge triggered by the system time signal;
• obtaining a to-be-measured clock cycle parameter according to the third and fourth clock cycle parameters, wherein the to-be-measured clock cycle parameter indicates cycle times of triggering the operation clock signal between the third and fourth triggering edges;
• and
• obtaining error information of the system time signal according to the to-be-measured clock cycle parameter and the reference clock cycle parameter.