High-frequency receiver with multiple-channel digital processing

A high frequency receiver having a receive subsystem comprising:

• a low noise amplifier followed by processing stages with analogue-to-digital conversion, wherein an analogue-to-digital converter is configured to work on the output from the low noise amplifier at a selected rate (Fe) which corresponds to band-pass sampling, and the processing stages comprise a custom circuit with an input memory arranged to contain N successive digital samples, renewed at the chosen rate in blocks of M samples,
• a complex digital low-pass filter with a chosen cut-off frequency, said filter configured to operate on the input memory to supply N filtered digital samples,
• an M-periodic summer of the N filtered digital samples, said summer configured to supply M filtered and summed digital samples,
• an M×M discrete Fourier transform stage operating on the M filtered and summed digital samples, wherein the digital signals on the M outputs of the Fourier transform representing M separate channels of a width defined by the cut-off frequency of the low-pass filter,
• a channelling stage configured to aggregate over time the digital signals at the M outputs of the Fourier transform stage, and
• a demodulation stage configured to demodulate the aggregated channels and recover the original signal on each channel wherein the demodulation stage comprises an extrapolation of the tangent arc demodulation stage.