Voltage switch circuit and nonvolatile memory device using the same
AssigneeHynix Semiconductor Inc.
InventorsJae Ho Lee, Jin Su Park
Life of this patent
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Abstract
A voltage switch circuit includes a positive voltage supply circuit configured to supply a positive voltage to a control node in response to an enable signal, a negative voltage supply circuit configured to supply a negative voltage to the control node in response to a negative voltage enable signal, a control signal generation circuit configured to generate the negative voltage enable signal in response to the enable signal, and a switch circuit configured to transfer an input voltage with a positive potential or a negative potential to an output node in response to a potential of the control node.
Claims20
A voltage switch circuit having an output node, comprising:
- a positive voltage supply circuit configured to supply a positive voltage to a control node;
- a negative voltage supply circuit configured to supply a negative voltage to the control node in response to a negative voltage enable signal;
- a control signal generation circuit configured to generate the negative voltage enable signal in response to an enable signal;
- and
- a switch circuit configured to transfer an input voltage with a positive potential or a negative potential to the output node in response to a potential of the control node,
- wherein the positive voltage supply circuit comprises a depletion transistor and a positive voltage transistor that are coupled in series between the control node and a terminal to which the positive voltage supplied.
A nonvolatile memory device, comprising:
- a memory cell block;
- a block decoder circuit configured to output a block selection signal having a logic high with a positive voltage and having a logic low with a negative voltage and select the memory cell block in response to a block enable signal;
- and
- an operating voltage transmission unit configured to transfer an operating voltage to the memory cell block in response to the block selection signal,
- wherein the block decoder circuit comprises:
- a block address decoder configured to output an enable signal in response to the block enable signal when an inputted address signal matches an address for the memory cell block;
- a positive voltage supply circuit configured to supply the positive voltage to a control node in response to the enable signal;
- a negative voltage supply circuit configured to supply the negative voltage to the control node in response to a negative voltage enable signal;
- and
- a control signal generation circuit configured to generate the negative voltage enable signal in response to the enable signal,
- wherein the positive voltage supply circuit comprises a depletion transistor and a positive voltage transistor coupled in series between the control node and a terminal to which the positive voltage supplied.
Dependencies are inferred from the claim text.