Systems and methods for averaging error rates in non-volatile devices and storage systems
AssigneeDensbits Technologies Ltd.
InventorHanan Weingarten
Life of this patent
Estimating the term…
Abstract
A system for storing a plurality of logical pages in a set of at least one flash device, each flash device including a set of at least one erase block, the system comprising apparatus for distributing at least one of the plurality of logical pages over substantially all of the erase blocks in substantially all of the flash devices, thereby to define, for at least one logical page, a sequence of pagelets thereof together including all information on the logical page and each being stored within a different erase block in the set of erase blocks; and apparatus for reading each individual page from among the plurality of logical pages including apparatus for calling and ordering the sequence of pagelets from different erase blocks in the set of erase blocks.
Claims18
A device operative in conjunction with a data source supplying a stream of logical pages including data and a flash memory system including a multiplicity of flash memory cells, wherein said multiplicity of flash memory cells comprise several subsets of flash memory cells each subset of flash memory cells having a characteristic range of bit error rates which differs from a characteristic range of bit error rates of at least one other subset of flash memory cells, different subsets of flash memory cells comprise different flash memory cells, the device comprising:
- an encoder for encoding logical pages of the stream of logical pages to provide encoded pages;
- a bit error rate (BER) distributing apparatus operative to break down each encoded page into multiple pagelets, to group together pagelets of different encoded pages and to distribute data from at least one encoded page of said encoded pages between at least two of said subsets of flash memory cells.
A method for facilitating interaction between a data source supplying a stream of logical pages including data and a flash memory system including a multiplicity of flash memory cells, wherein said multiplicity of flash memory cells comprise several subsets of flash memory cells, each subset of flash memory cells having a characteristic range of bit error rates which differs from a characteristic range of bit error rates of at least one other subset of flash memory cells, different subsets of flash memory cells comprise different flash memory cells, the method comprising encoding logical pages of the stream of logical pages to provide encoded pages;
- breaking down each encoded page into multiple pagelets, grouping together pagelets of different encoded pages and distributing data from at least one encoded page of said encoded pages between at least two of said subsets of flash memory cells.
Dependencies are inferred from the claim text.