Semiconductor storage device
AssigneeHitachi, Ltd.
InventorsAkio Shima, Yoshitaka Sasago, Masaharu Kinoshita, Toshiyuki Mine, Norikatsu Takaura, Takahiro Morikawa, Kenzo Kurotsuchi, Satoru Hanzawa
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AssigneeHitachi, Ltd.
InventorsAkio Shima, Yoshitaka Sasago, Masaharu Kinoshita, Toshiyuki Mine, Norikatsu Takaura, Takahiro Morikawa, Kenzo Kurotsuchi, Satoru Hanzawa
Estimating the term…
There is provided a semiconductor storage device which is capable of further reducing a size of a memory cell, and increasing a storage capacity. Plural memory cells each including a transistor formed on a semiconductor substrate, and a variable resistive device having a resistance value changed by voltage supply and connected between source and drain terminals of the transistor are arranged longitudinally and in an array to configure a three-dimensional memory cell array. A memory cell structure has a double channel structure in which an inside of a switching transistor is filled with a variable resistance element, particularly, a phase change material. The switching transistor is turned off by application of a voltage to increase a channel resistance so that a current flows in the internal phase change material to operate the memory.
A semiconductor storage device comprising:
Dependencies are inferred from the claim text.