Semiconductor storage device
AssigneeHitachi, Ltd.
InventorsTakayuki Kawahara, Kiyoo Itoh, Riichiro Takemura, Kenchi Ito
Life of this patent
Estimating the term…
Loading patent…
AssigneeHitachi, Ltd.
InventorsTakayuki Kawahara, Kiyoo Itoh, Riichiro Takemura, Kenchi Ito
Estimating the term…
To write information on a memory cell of SPRAM formed of an MOS transistor and a tunnel magnetoresistive element, the memory cell is supplied with a current in a direction opposite to a direction of a current required for writing the information on the memory cell, and then, the memory cell is supplied with a current required for writing. In this manner, even when the same information is sequentially written on the memory cell, since the currents in the two directions are caused to flow in pairs in the tunnel magnetoresistive element of the memory cell each time information is rewritten, deterioration of a film that forms the tunnel magnetoresistive element can be suppressed. Therefore, reliability of the SPRAM can be improved.
A semiconductor storage device comprising:
Dependencies are inferred from the claim text.