Arrays of vertically stacked tiers of non-volatile cross point memory cells, methods of forming arrays of vertically stacked tiers of non-volatile cross point memory cells, and methods of reading a data value stored by an array of vertically stacked tiers of non-volatile cross point memory cells

An array of vertically stacked tiers of non-volatile cross point memory cells, comprising:

• a plurality of horizontally oriented word lines within individual tiers of memory cells;
• a plurality of horizontally oriented global bit lines having local vertical bit line extensions extending through multiple of the tiers of memory cells;
• individual of the memory cells comprising multi-resistive state material received between one of the horizontally oriented word lines and one of the local vertical bit line extensions where such cross, with such ones of the horizontally oriented word lines and local vertical bit line extensions comprising opposing conductive electrodes of individual memory cells where such cross;
• and
• a plurality of bit line select circuits individually electrically and physically connected to individual of the local vertical bit line extensions and configured to supply a voltage potential to multiple of the local vertical bit line extensions.

A method of reading a data value stored by an array of vertically stacked tiers of non-volatile cross point resistive oxide memory cells, wherein individual of the memory cells comprise multi-resistive state metal oxide-comprising material received between a word line and a bit line where such cross, comprising:

• pulling one of a plurality of horizontally oriented word lines within individual tiers of memory cells to a first voltage potential;
• electrically connecting one of a plurality of horizontally oriented global bit lines having local vertical bit line extensions extending through multiple of the tiers of memory cells to a voltage source via one of the local vertical bit line extensions, thereby pulling the one bit line to a second voltage potential;
• and
• based on the pulling of the one of the horizontally oriented word lines to the first voltage potential and the pulling of the one of the horizontally oriented global bit lines to the second voltage potential, determining a data value stored by one of the memory cells of the array.