Power amplifier
AssigneesSanyo Semiconductor Co., Ltd., Semiconductor Components Industries, LLC
InventorYoshitaka Matsumoto
Life of this patent
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Abstract
A power amplifier for driving a load connected to an output terminal having an output transistor connected in parallel with a corresponding current detection path between the output terminal and a power supply. The detection path includes a switching device and a resistor connected in series, the switching device is turned on only during an on-state period of the corresponding output transistor, and the presence or absence of over-current generation is detected at the output transistors on the basis of a sensing signal obtained from a point connecting the switching device and the resistor. When over-current is detected, the operation of the output transistors is stopped to protect the amplifier.
Claims7
A power amplifier for driving a load connected to an output terminal, comprising:
- an output transistor connected between said output terminal and a power supply, said output transistor supplying a driving signal to said load;
- an amplifier driver for driving said output transistor;
- a current detection path comprising a switching device and a resistor connected in series and said path disposed in parallel with said output transistor between said power supply and said output terminal;
- and
- an over-current detector for controlling said switching device so as to turn on during an on-state operating period of said output transistor and detecting over-current flowing to said output transistor on the basis of a sensing signal obtained from a point connecting said switching device and said resistor of said current detection path;
- wherein the sensing signal and a signal for turning on or off the switching device are input to a first AND gate;
- the over-current detector is configured to control said output transistor on the basis of the output signal of the AND gate;
- wherein the power amplifier further comprises a second AND gate configured to output the signal for turning on or off the switching device to the first AND gate;
- and
- wherein inputs to the second AND gate comprise:
- a first signal provided from a pre-drive;
- a gate signal obtained by delaying the first signal with a first delay circuit;
- and
- a delayed gate signal obtained by delaying the gate signal by a second delay circuit.
Dependencies are inferred from the claim text.