ESD clamp for multi-bonded pins
AssigneeIntersil Americas Inc.
InventorsClaudio Collura, Allan R. Warrington, Neil E. Robinson
Life of this patent
Estimating the term…
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AssigneeIntersil Americas Inc.
InventorsClaudio Collura, Allan R. Warrington, Neil E. Robinson
Estimating the term…
A circuit comprises a plurality of segments and a clamp circuit. Each of the plurality of segments comprises a bond pad coupled to a multi-bonded pin via a respective bond wire and a conductor coupling the bond pad to a respective internal connection. The bond pad from each of the plurality of segments is coupled to the same multi-bonded pin. The clamp circuit comprises a plurality of input pins and a plurality of clamp transistors. Each input pin is coupled to the bond pad of a respective one of the plurality of segments via the respective conductor. Each clamp transistor is coupled to a respective one of the input pins, wherein each of the plurality of clamp transistors is configured to prevent a voltage on the respective conductor from exceeding a respective voltage limit.
A circuit comprising:
An electronic system comprising:
A method of designing a circuit having a multi-bonded pin clamp, the method comprising:
Dependencies are inferred from the claim text.