Method and system for implementing compression across a graphics bus interconnect
AssigneeNVIDIA Corporation
InventorsAnthony Michael Tamasi, John M. Danskin, David G. Reed, Brian M. Kelleher
Life of this patent
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Abstract
A system for compressed data transfer across a graphics bus in a computer system. The system includes a bridge, a system memory coupled to the bridge, and a graphics bus coupled to the bridge. A graphics processor is coupled to the graphics bus. The graphics processor is configured to compress graphics data and transfer compressed graphics data across the graphics bus to the bridge for subsequent storage in the system memory.
Claims19
A system for data transfer across a graphics bus in a computer system, comprising:
- a bridge;
- a system memory coupled to the bridge;
- a graphics bus coupled to the bridge;
- and
- a graphics processor coupled to the graphics bus, wherein the graphics processor is configured to compress graphics data and transfer compressed graphics data across the graphics bus to the bridge, wherein the bridge is configured to divide the graphics data into a plurality of system memory aligned tiles and store the tiles into the system memory, wherein the system memory aligned tiles are aligned with a minimum data access size, and wherein the graphics data is compressed to at least a four to one ratio;
- wherein the graphics processor includes a transfer logic unit for merging the compressed graphics data into tiles of pre-existing graphics data stored in the system memory;
- and
- wherein a data merge is performed by a transfer logic unit fetching and decompressing pre-existing graphics data from tiles, decompressing the compressed graphics data from the GPU, and generating merged data therefrom, wherein the system memory is used as temporary storage, and wherein the merged data is then compressed by the transfer logic unit and stored, in alignment, in the tiles of the system memory.
A bridge for implementing data transfer across a graphics bus in a computer system, comprising:
- a system memory bus interface;
- a graphics bus interface;
- a RAM;
- a transfer logic unit, wherein the transfer logic unit is configured to receive compressed graphics data from a graphics processor via the graphics bus interface for storage in a system memory, and wherein the transfer logic unit is configured to divide the graphics data into a plurality of system memory aligned tiles and store the tiles into the system memory, wherein the memory aligned tiles are aligned with a minimum data access size, and wherein the graphics data is compressed to at least a four to one ratio;
- and
- wherein a data merge is performed by a transfer logic unit fetching and decompressing pre-existing graphics data from tiles, decompressing the compressed graphics data from the GPU, and generating merged data therefrom, wherein the system memory is used as temporary storage, and wherein the merged data is then compressed by the transfer logic unit and stored, in alignment, in the tiles of the system memory.
In a bridge of a computer system, a method for implementing data transfer across a graphics bus in a computer system, comprising:
- fetching pre-existing compressed graphics data from a system memory to a RAM of the bridge;
- decompressing the pre-existing compressed graphics data;
- decompressing compressed graphics data received from a graphics processor;
- generating merged data;
- compressing the merged data;
- storing the merged data in the system memory, wherein the merged data is divided into a plurality of system memory aligned tiles and stored as tiles in the system memory, wherein the memory aligned tiles are aligned with a minimum data access size, and wherein the graphics data is compressed to at least a four to one ratio;
- and
- wherein a data merge is performed by a transfer logic unit fetching and decompressing pre-existing graphics data from tiles, decompressing the compressed graphics data from the GPU, and generating merged data therefrom, wherein the system memory is used as temporary storage, and wherein the merged data is then compressed by the transfer logic unit and stored, in alignment, in the tiles of the system memory.
Dependencies are inferred from the claim text.