Resistor structure of phase change material and trimming method thereof
AssigneeSTMicroelectronics S.r.l.
InventorStefania Maria Serena Privitera
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AssigneeSTMicroelectronics S.r.l.
InventorStefania Maria Serena Privitera
Estimating the term…
An embodiment of a resistor formed by at least one first portion and one second portion, electrically coupled to one another and with different crystalline phases. The first portion has a positive temperature coefficient, and the second portion has a negative temperature coefficient. The first portion has a first resistivity, and the second portion has a second resistivity, and the portions are coupled so that the resistor has an overall temperature coefficient that is approximately zero.
A process for manufacturing a resistor structure of phase change material, comprising the steps of:
A method, comprising:
A method, comprising:
Dependencies are inferred from the claim text.
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Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered…:…
Adapted for trimming: adjusting the temperature coefficient; Adjusting value of resistance by adjusting temperature coefficient of resistance
Resistors: resistors having no potential barriers
Electrical device making: resistor making
About 3 years 2 months of term left · ends 15 Dec 2029 (estimated)
An embodiment of the present disclosure relates to a resistor structure of phase change material with trimmable resistance and trimmable temperature coefficient of resistance and to a trimming method thereof.
As is known, many integrated circuits employ thin-film resistors usually for controlling the current or the voltage of other components of the integrated circuit. Thin-film resistors are typically deposited by vacuum evaporation or sputtering and are made of different materials, such as CrSi, TaN, and NiCr.
Even using highly controlled processes, the initial resistance of these components may have a tolerance of 3-15%, according to the desired value of resistance. More accurate values may be obtained by physically removing portions of the resistor in a subsequent trimming operation, carried out via laser while verifying the electrical characteristics of components at wafer level, i.e., during electrical wafer sorting (EWS). To this end, laser-beam trimming systems have been developed, which have various advantages, such as speed, accuracy, and cleanliness. These systems may be controlled via computer to modify and adjust the electrical parameters of the components while their values are being measured.
For a better understanding of the present disclosure, one or more embodiments thereof are now described, purely by way of non-limiting example, with reference to the attached drawings, wherein:
FIG. 1 is a view in cross-section of an embodiment of a phase change resistor;
FIG. 2 is a top plan view of an embodiment of the phase change resistor of FIG. 1;
FIG. 1 shows a resistor 1 of phase change material (identified hereinafter as a PC resistor) formed on a substrate 2. The substrate 2 may be of a semiconductor material, or may be a silicon-on-insulator (SOI) substrate, or a flexible substrate with transistors and other electronic components integrated inside it or on top of it. In an embodiment, a phase change material may be characterized by a strong variation of the electrical resistivity and by a change of the polarity of the temperature coefficient of resistance as a result of a phase transition being obtainable by heating, annealing, and melting the material using a thermal process, or electric or laser pulses.
In the example shown, the substrate 2 comprises an insulating structure 3. The insulating structure 3 may be formed, for example, by a silicon-oxide field-insulation region, or by a trench insulation region of a shallow trench or deep trench type, which extends inside the substrate 2. A first dielectric layer 4, for example of oxide, extends on the insulating structure 3.
Bottom metal regions 10a, 10b are formed on the first dielectric layer 4 and may be part of the first metal level or of any metal level. The bottom metal regions 10a, 10b are, for example, of aluminium or copper-aluminium, with suitable barrier layers, but other metals may be used. An intermediate dielectric layer 11 extends on the first dielectric layer 4 and on the bottom metal regions 10a, 10b. The intermediate dielectric layer 11 may be a single layer or a multilayer of tetraorthosilicate (TEOS), a spin-on glass, a fluorinated-silicon glass (FSP), phosphorous-boron-silicon glass (PBSG) or other dielectric, in a per se known manner.