Oscillators with low power mode of operation
AssigneeQUALCOMM Incorporated
InventorMichael P. Mack
Life of this patent
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Abstract
A method and apparatus for configuring an oscillator circuit to selectively switch between a low power mode and a normal mode of operation. The oscillator circuit includes an oscillator core in parallel with a dynamically configurable gain circuit. The oscillator core is configured to generate a clock signal. One or more gain elements of the gain circuit can be selectively disabled to reduce the operating power level of the oscillator circuit during a low power mode.
Claims19
An oscillator circuit configured to selectively switch between a low power mode and a normal mode of operation, the oscillator circuit comprising:
- an oscillator core configured to generate a clock signal;
- and
- a dynamically configurable gain circuit including a plurality of first gain elements, each selectively connected in parallel with the oscillator core in response to a corresponding one of a plurality of enable signals, wherein during the low power mode, the enable signals are sequentially pulsed to an asserted state to temporarily enable the corresponding first gain circuits during staggered time intervals with respect to the clock signal.
An integrated circuit including an oscillator circuit configured to selectively switch between a low power mode and a normal mode of operation in response to a mode select signal, the oscillator circuit comprising:
- an oscillator core for generating a clock signal;
- a plurality of first gain elements coupled in parallel with the oscillator core, wherein each of the first gain elements is selectively disabled in response to a corresponding one of a plurality of enable signals;
- and
- a state machine configured to sequentially pulse the enable signals to an asserted state in response to the mode select signal indicating the low power mode, wherein the sequentially pulsed enable signals temporarily enable the first gain elements in staggered time intervals with respect to the clock signal.
A method of operating an oscillator circuit having a plurality of gain elements coupled in parallel with an oscillator core and configured to operate in either a normal mode or in a low power mode, the method comprising:
- asserting the mode select signal to indicate the low power mode;
- generating a plurality of enable signals in response to the mode select signal;
- sequentially pulsing the enable signals to asserted states in a staggered manner;
- and
- temporarily enabling each of the gain elements in a staggered manner in response to the corresponding enable signals.
Dependencies are inferred from the claim text.