Low-noise amplifier with gain enhancement
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsHsieh-Hung Hsieh, Po-Yi Wu, Ho-Hsiang Chen, Chewn-Pu Jou, Fu-Lung Hsueh
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AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsHsieh-Hung Hsieh, Po-Yi Wu, Ho-Hsiang Chen, Chewn-Pu Jou, Fu-Lung Hsueh
Estimating the term…
A low-noise amplifier (“LNA”) includes a first cascode gain stage including a first complementary metal oxide semiconductor (“CMOS”) transistor configured to receive a radio frequency (“RF”) input signal and a second CMOS transistor coupled to an output node. The first inductive gate network is coupled to a gate of the second CMOS transistor for increasing a gain of the first cascode gain stage. The first inductive gate network has a non-zero inductive input impedance and includes at least one passive circuit element.
A low-noise amplifier (“LNA”), comprising:
A low-noise amplifier (“LNA”), comprising:
A method, comprising:
A method, comprising
Dependencies are inferred from the claim text.
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The device being at least one of the amplifying solid-state elements: using field-effect transistors [FET]
By use of cascode coupling, i.e. earthed cathode or emitter stage followed by earthed grid or base stage respectively: with mosfet's
With semiconductor devices only: in integrated circuits
Indexing scheme relating to amplifiers: a switch coupled in the input circuit of an amplifier being controlled by a circuit, e.g. feedback…
About 4 years 3 months of term left · ends 5 Feb 2031 (estimated)
The disclosed circuits and methods relate to millimeter wave receivers. More specifically, the disclosed circuits and methods relate to millimeter wave receivers including a low noise amplifiers having gain enhancement.
Millimeter-wave frequencies generally refer to signals in the frequency band between approximately 30 GHz to 300 GHz, which are frequently used in various applications such as wireless personal area networks (“WPANs”), automobile radar, and image sensing. Various LNAs for millimeter waves have been disclosed. For example, millimeter-wave LNAs were initially implemented in Group III-V compound semiconductors or implemented using cascode amplifiers based on bipolar junction transistor (“BJT”) technology. However, LNAs implemented using compound III-V semiconductors or BJTs are not easily integrated with the other components of the receiver, especially for digital circuits, resulting in higher implementation costs.
Recent advances in complementary metal oxide semiconductor (“CMOS”) technologies have enabled millimeter-wave integrated circuits to be implemented at lower costs as multi-stage LNAs. However, these multi-stage LNAs experience passive losses across the input, inter-stage, and output matching networks, which lead to insufficient gain. Consequently, the amplitude of the amplified signal after the LNA is too small to be accurately processed by the rest of the circuitry of a receiver.
FIG. 1 is a block diagram of one example of an improved low-noise amplifier.
FIG. 2A is a schematic diagram of one example of an improved single-stage low-noise amplifier including an inductive gate network.
FIG. 2B is a schematic diagram of one example of an improved two-stage low-noise amplifier with each stage including an inductive gate network.
Being the first active receiver circuit after the antenna, the low-noise amplifier (“LNA”) is a critical building block for radio transceivers as it impacts both ends of the dynamic range of the receiver. To improve receiver sensitivity or reduce receiver noise figure, LNAs are implemented with low noise figures and high-power gains to further deemphasize noise contributions downstream in the receiver.
FIG. 1 is a block diagram of one example of an improved LNA 100 including a cascode gain stage 102 having a common source transistor 112 having its drain coupled to the source of a common gate transistor 106. Each of the circuit elements of LNA 100 may be implemented using complementary metal oxide semiconductor (“CMOS”) technology. A radio frequency (“RF”) input signal is received at node 108, which is coupled to the gate of common source transistor 112. The output of LNA 100 is taken from node 110, which is coupled between an operating voltage source VDD and the drain of common gate transistor 106.
An inductive gate network 104 having a non-zero input impedance Z104 is coupled to the gate of the common gate transistor 106 and includes one or more passive circuit devices or elements. For example, inductive gate network 104 may include resistors, capacitors, inductors, varactors, inductive transmission lines, and combinations thereof as will be understood by one skilled in the art after reading the following description. Coupling the inductive gate network 104 to the gate of common gate transistor 106 advantageously increases the gain performance of LNA 100 without requiring additional direct current (“DC”) power consumption since inductive gate network 104 includes passive components.