Integrated circuits with bi-directional charge pumps
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsYvonne Lin, Tien-Chun Yang
Life of this patent
Estimating the term…
Abstract
Integrated circuits such as memory arrays are coupled to a bi-directional charge pump that includes an input circuit and output circuit, and one or more pump stages coupled between the input circuit and the output circuit of the bi-directional charge pump. The output circuit includes a diode having an input and output and a transistor connected to the output of the diode and a ground potential. The input of the diode is electrically connected to the pump stages in a configuration that allows the charge pump to apply a positive or negative voltage to the memory array or other load.
Claims26
An integrated circuit comprising:
- a load circuit;
- a bi-directional charge pump being electrically connected to the load circuit, the bi-directional charge pump having an input circuit and output circuit, and one or more pump stages coupled between the input circuit and the output circuit of the bi-directional charge pump, wherein the output circuit includes a diode having an input and output and a transistor being connected to the output of the diode and a ground potential;
- and
- one or more output switches that include a second diode having an input and an output and a second transistor connected to the output of the second diode and to the ground potential,
- wherein the input of the diode is electrically connected to the pump stages, the input of the second diode is electrically connected to an output of any intermediate pump stages, a positive voltage at the output of the intermediate pump stages is input at the input of the second diode, and the positive voltage switches on the second diode, which discharges the positive voltage through the second transistor to ground potential and provides a second positive pump (P-pump) that is located between the second diode and the second transistor.
An integrated circuit comprising:
- a load circuit;
- and
- a bi-directional charge pump being electrically connected to the load circuit, the bi-directional charge pump having an input circuit and output circuit, and one or more pump stages coupled between the input circuit and the output circuit of the bi-directional charge pump, wherein each pump stage includes one or more deep N-well transistors, wherein each structure of the deep N-well transistors includes a P-well, a deep N-well, and multiple N+ and P+ type semiconductor materials, wherein the P-well is embedded within the deep N-well, wherein the multiple N+ and P+ type semiconductor materials are embedded within the P-well and the deep N-well and located adjacent to a top surface of the P-well and the deep N-well,
- wherein each pump stage includes a first deep N-well switch and a second deep N-well switch that are connected to their respective source terminal and drain terminal, wherein the first deep N-well switch turns on and the second deep N-well switch turns off to connect the P-well to the deep N-well of the deep N-well transistors in a positive pump mode via the other N pellet of the deep N-well and the PN pellets of the P well, wherein the second deep N-well switch turns on and the first deep N-well switch turns off to connect the deep N-well transistors to a ground potential in a negative pump mode via the other N pellet of the deep N-well of the deep N-well transistors.
An integrated circuit comprising:
- a load circuit;
- and
- a charge pump having an input circuit and output circuit coupled to the load circuit, and one or more pump stages coupled between the input circuit and the output circuit of the charge pump, wherein each pump stage includes
- one or more output switches that include a diode having an input and output and a transistor being connected to the output of the diode and a ground potential,
- a P-well switch that is connected to one or more deep N-well transistors, the P-well switch including a PMOS transistor and an NMOS transistor each having a source terminal, a gate terminal and a drain terminal, the drain terminals of the PMOS and NMOS transistors are electrically connected to the P-well of the deep N-well transistors, the gate and source terminals of the PMOS transistor are electrically connected to the ground potential and the source terminal of the NMOS transistors, the gate of the NMOS transistor is electrically connected to a second negative voltage,
- wherein the input of the diode is electrically connected to an output of any intermediate pump stages,
- wherein in a positive pump mode and a negative pump mode, the P-well switch biases a P-well of the deep N-well transistors to a first positive voltage and a first negative voltage, respectively, and
- wherein the PMOS transistor is turned on and the NMOS transistor is turned off to bias the P-well of the deep N-well transistors to the first positive voltage to enhance the pump's efficiency, wherein the PMOS transistor is turned off and the NMOS transistor is turned on to bias the P-well of the deep N-well transistors to the first negative voltage that is based on the second negative voltage to avoid a bipolar turn on.
Dependencies are inferred from the claim text.