Delay circuit and method for driving the same

A delay circuit comprising:

• a first input unit configured to receive an input signal;
• a first delay unit configured to output a first output signal by performing a delay operation to delay the input signal transferred from the first input unit by a first value corresponding to delay information;
• a second input unit configured to receive the input signal;
• a second delay unit configured to output a second output signal by performing a delay operation to delay the input signal transferred from the second input unit by a second value corresponding to the delay information;
• and
• a final output unit configured to activate a final output signal when the first output signal or the second output signal is activated,
• wherein the first input unit transfers the input signal when the first delay unit is not performing the delay operation, and the second input unit transfers the input signal when the first delay unit is performing the delay operation.

A method for driving a delay circuit comprising first and second delay units, which receive an input signal and perform a delay operation, the method comprising:

• outputting a first output signal of the first delay unit by delaying the input signal by a first value corresponding to delay information;
• outputting a second output signal of the second delay unit by delaying the input signal by a second value corresponding to the delay information when the first delay unit is performing the delay operation;
• and
• activating a final output signal when the first output signal of the first delay unit or the second output signal of the second delay unit is activated,
• wherein the outputting of the first output signal of the first delay unit comprises:
• generating a first pulse signal, which is activated in response to the input signal and has a pulse width corresponding to the delay information;
• and
• activating the first output signal in response to a deactivation of the first pulse signal,
• wherein the generating of the first pulse signal comprises:
• outputting a synchronization signal by synchronizing the input signal with a clock;
• sequentially shifting the synchronization signal, which is in synchronization with the clock;
• outputting a selection signal by selecting a shifted signal in response to the delay information;
• and
• activating the first pulse signal in response to the synchronization signal and deactivating the first pulse signal in response to the selection signal.