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US 8,427,207 B2Granted
Semiconductor device arrangement and method
AssigneeInfineon Technologies AG
InventorGerald Deboy
Life of this patent
Estimating the term…
Abstract
A semiconductor device arrangement and a method. One embodiment includes at least one power transistor and at least one gate resistor located between a gate of the power transistor and a connecting point in the drive circuit of the power transistor. The semiconductor device arrangement includes a switchable element between the connecting point and a source of the power transistor.
Claims19
A semiconductor device comprising:
- at least one power transistor;
- at least one gate resistor located between a gate of the power transistor and a connecting point in a drive circuit of the power transistor;
- and
- a switchable element provided between the connecting point and a source of the power transistor, wherein the switchable element is monolithically integrated into the power transistor.
1 more element
A semiconductor device arrangement comprising:
- a power transistor having a gate;
- a connecting point in a drive circuit of the power transistor;
- a gate resistor of the power transistor located between the connecting point and the gate;
- and
- a switchable element located between the connecting point and a source of the power transistor and connected to the gate such that the parasitic inductances between the connecting point and the source are bridged in the turn-off phase of the power transistor at steep switching edges, wherein the switchable element is monolithically integrated into the power transistor.
2 more elements
A method for the production of a semiconductor device arrangement with a switchable element in the drive circuit, comprising:
- providing a power transistor with parasitic inductances between a connecting point and a source and with a gate resistor between the connecting point and the gate;
- monolithically integrating a switchable element into the power transistor, wherein the switchable element, at a steep switching edge, bridges the inductances between the connecting point and the source in a turn-off phase of the power transistor.
Dependencies are inferred from the claim text.