Probe wafer, probe device, and testing system
AssigneeAdvantest Corporation
InventorsYoshio Komoto, Yoshiharu Umemura
Life of this patent
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AssigneeAdvantest Corporation
InventorsYoshio Komoto, Yoshiharu Umemura
Estimating the term…
There is provided a testing system for testing a plurality of semiconductor chips formed on a single semiconductor wafer. The testing system includes a wafer substrate, a plurality of wafer connector terminals that are provided on the wafer substrate in such a manner that one or more wafer connector terminals correspond to each of the semiconductor chips, where each wafer connector terminal is to be electrically connected to an input/output terminal of a corresponding semiconductor chip, a plurality of circuit units that are provided on the wafer substrate in such a manner that one or more circuit units corresponds to each of the semiconductor chips, where each circuit unit generates a test signal to be used for testing a corresponding semiconductor chip and supplies the test signal to the corresponding semiconductor chip to test the corresponding semiconductor chip, and a controller that generates a control signal used to control the plurality of circuit units.
A probe wafer to be electrically connected to a semiconductor wafer having a plurality of semiconductor chips formed thereon, the probe wafer comprising:
A probe device to be electrically connected to a semiconductor wafer having a plurality of semiconductor chips formed thereon, the probe device comprising:
A probe wafer to be electrically connected to a semiconductor wafer having a plurality of semiconductor chips formed thereon, the probe wafer comprising:
Dependencies are inferred from the claim text.