Semiconductor chip comprising a directional coupler having a specific main line and sub-line arrangement
AssigneeRenesas Electronics Corporation
InventorsSatoshi Sakurai, Satoshi Goto, Toru Fujioka
Life of this patent
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Abstract
A technique capable of promoting miniaturization of an RF power module used in a mobile phone etc. is provided. A directional coupler is formed inside a semiconductor chip in which an amplification part of the RF power module is formed. A sub-line of the directional coupler is formed in the same layer as a drain wire coupled to the drain region of an LDMOSFET, which will serve as the amplification part of the semiconductor chip. Due to this, the predetermined drain wire is used as a main line and the directional coupler is configured by a sub-line arranged in parallel to the main line via an insulating film, together with the main line.
Claims21
A semiconductor device comprising:
- a semiconductor chip including a power amplifier circuit,
- a semiconductor substrate,
- wherein the semiconductor chip is disposed over the semiconductor substrate and has:
- (a) a transistor constituting the power amplifier circuit disposed over the semiconductor substrate;
- wherein the transistor comprises:
- (a1) a plurality of drain wires coupled to a drain region of the transistor;
- and
- (a2) a plurality of source wires coupled to a source region of the transistor, wherein the drain wires and source wires extend in a predetermined direction, and the drain wires and the source wires are arranged by turns in parallel to each other;
- and
- (b) a directional coupler disposed over the semiconductor substrate and that detects power output from the power amplifier circuit;
- wherein the directional coupler includes:
- (b1) a main line using one of the drain wires of the transistor;
- and
- (b2) a sub-line, adjacent to the main line, having a first terminal and a second terminal, the first terminal of which is electrically coupled with a detector circuit that converts an output from the directional coupler into a voltage or current and the second terminal is electrically coupled with a GND via a passive element;
- and
- wherein the main line and the sub-line are arranged in parallel to each other and no conductor exists between the main line and the sub-line,
- wherein the main line and the sub-line are disposed in a same horizontal plane of a wire layer,
- wherein the power amplifier circuit and the directional coupler are disposed integrally in the semiconductor chip, and
- wherein the sub-line is disposed above a part of one of the source wires coupled to the transistor.
A semiconductor device comprising:
- a semiconductor chip including a power amplifier circuit,
- a semiconductor substrate,
- wherein the semiconductor chip is disposed over the semiconductor substrate and has:
- (a) a transistor constituting the power amplifier circuit disposed over the semiconductor substrate;
- wherein the transistor comprises:
- (a1) a plurality of drain wires coupled to a drain region of the transistor;
- and
- (a2) a plurality of source wires coupled to a source region of the transistor, wherein the drain wires and source wires extend in a predetermined direction, and the drain wires and the source wires are arranged by turns in parallel to each other;
- (b) a plurality of wire layers each disposed in a different horizontal plane over the semiconductor substrate;
- wherein the wire layers include:
- (b1) a first wire layer including the drain wires and the source wires,
- (b2) a second wire layer, upper horizontal plane of the first wire layer, including the drain wires, and
- (c) a directional coupler disposed over the semiconductor substrate and that detects power output from the power amplifier circuit;
- wherein the directional coupler includes:
- (c1) a main line using one of the drain wires of the transistor;
- and
- (c2) a sub-line, adjacent to the main line, having a first terminal and a second terminal, the first terminal of which is electrically coupled with a detector circuit that converts an output from the directional coupler into a voltage or current and the second terminal is electrically coupled with a GND via a passive element;
- and
- wherein the main line and the sub-line are arranged in parallel to each other and no conductor exists between the main line and the sub-line,
- wherein the main line and the sub-line are disposed in a same horizontal plane of a wire layer,
- wherein the power amplifier circuit and the directional coupler are disposed integrally in the semiconductor chip, and
- wherein the sub-line is disposed above a part of one of the source wires coupled to the transistor.
A semiconductor device comprising:
- a semiconductor chip including a power amplifier circuit,
- a semiconductor substrate,
- wherein the semiconductor chip is disposed over the semiconductor substrate and has:
- (a) a transistor constituting the power amplifier circuit disposed over the semiconductor substrate;
- wherein the transistor comprises:
- (a1) a plurality of drain wires coupled to a drain region of the transistor;
- and
- (a2) a plurality of source wires coupled to a source region of the transistor, wherein the drain wires and source wires extend in a predetermined direction, and the drain wires and the source wires are arranged by turns in parallel to each other;
- and
- wherein a number of wire layers that forms the source wires is smaller than a number of wire layers that form the drain wire;
- and
- (b) a directional coupler disposed over the semiconductor substrate and that detects power output from the power amplifier circuit;
- wherein the directional coupler includes:
- (b1) a main line using one of the drain wires of the transistor;
- and
- (b2) a sub-line, adjacent to the main line, having a first terminal and a second terminal, the first terminal of which is electrically coupled with a detector circuit that converts an output from the directional coupler into a voltage or current and the second terminal is electrically coupled with a GND via a passive element;
- and
- wherein the main line and the sub-line are arranged in parallel to each other and no conductor exists between the main line and the sub-line,
- wherein the main line and the sub-line are disposed in a same horizontal plane of a wire layer,
- wherein the power amplifier circuit and the directional coupler are disposed integrally in the semiconductor chip, and
- wherein the sub-line is disposed above a part of one of the source wires coupled to the transistor.
Dependencies are inferred from the claim text.