Semiconductor device for use in a power supply circuit and having a power MOSFET and Schottky barrier diode

A semiconductor device for use in a power supply circuit which includes:

• a first MOSFET having a source drain path, and
• a second MOSFET having a source drain path coupled to the source drain path of the first MOSFET and which is included in the semiconductor device,
• wherein a load element is coupled to the connection node of the source drain path of the first MOSFET and the source drain path of the second MOSFET,
• the semiconductor device including the second MOSFET and a Schottky barrier diode, comprising:
• a semiconductor substrate having a first semiconductor layer and a second semiconductor layer on the first semiconductor layer, each of the first and second semiconductor layers having an n-type conductivity;
• a first region and a second region on a main surface of the second semiconductor layer;
• a plurality of first trenches in the first region;
• a first gate insulating film of the second MOSFET formed in each first trench;
• a first gate electrode of the second MOSFET formed in each first trench;
• a channel forming region of the second MOSFET formed between each of adjacent first trenches, the channel forming region having a p-type conductivity;
• a source region of the second MOSFET formed on each channel forming region, the source region having an n-type conductivity;
• a plurality of second trenches formed in the second region;
• a second gate insulating film of the second MOSFET formed in each second trench;
• a second gate electrode of the second MOSFET formed in each second trench, all of said first and second gate electrodes being connected to each other;
• a drain electrode formed over a back surface of the first semiconductor layer and electrically connected with the first and second semiconductor layers;
• an interlayer insulating film formed over the first and second gate electrodes;
• and
• an upper electrode formed over the interlayer insulating film, said upper electrode being electrically connected with each source region,
• wherein the upper electrode and the second semiconductor layer in the second region form portions of the Schottky barrier diode;
• each of the portions of the Schottky barrier diode is located between adjacent second gate electrodes;
• and
• a center-to-center distance between adjacent first gate electrodes is smaller than a center-to-center distance between the adjacent second gate electrodes.