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US 8,426,865 B2Granted
Polycrystalline silicon thin film transistors with bridged-grain structures
AssigneeThe Hong Kong University of Science and Technology
InventorsHoi Sing Kwok, Man Wong, Zhiguo Meng, Shuyun Zhao
Life of this patent
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Abstract
A low temperature polycrystalline silicon device and techniques to manufacture thereof with excellent performance. Employing doped poly-Si lines which we called a bridged-grain structure (BG), the intrinsic or lightly doped channel is separated into multiple regions. A single gate covering the entire active channel including the doped lines is still used to control the current flow. Using this BG poly-Si as an active layer and making sure the TFT is designed so that the current flows perpendicularly to the parallel lines of grains, grain boundary effects can be reduced.
Claims53
A transistor, comprising:
- a channel layer of a polycrystalline semiconductor material;
- first and second source/drain regions which are electrically connected by said channel layer;
- a control terminal which electrically interacts with said channel layer, to thereby control conduction between said first and second source/drain regions;
- and a plurality of crosswise conductive bridges on and in the said channel layer, wherein the plurality of crosswise conductive bridges span an entire width of the said channel layer and spacing between the plurality of crosswise conductive bridges is smaller than about 5 microns.
1 more element
A thin film transistor, comprising:
- a source region;
- a drain region;
- an active channel connecting said source and drain regions, with said active channel having multiple crosswise regions of high resistance and low resistance, wherein the crosswise regions are positioned across the direction of current flow, wherein the multi crosswise regions of low resistance span an entire width of the active channel and spacing between the multiple crosswise regions of low resistance is smaller than about 5 microns;
- and
- a gate which covers a substantial part of the said active channel, including the multiple crosswise regions of high resistance and low resistance, with the said gate being electrically insulated from the said active channel.
2 more elements
A thin film transistor, comprising:
- a source region;
- a drain region;
- and
- an active channel connecting the source and drain regions with the active channel having multiple crosswise regions of n and p-type dopants, wherein the regions cross the direction of current flow, and wherein the multiple crosswise regions span an entire width of the active channel and spacing between the multiple crosswise regions is smaller than about 5 microns.
1 more element
A semiconductor electrical element, comprising:
- a thin film semiconductor structure containing crystalline grains, separated by grain boundaries, deposited on a non-conducting substrate;
- and
- a plurality of doped regions in the form of lines bridging the grains, the doped regions positioned transversely to current flow, wherein the plurality of doped regions span an entire width of the thin film semiconductor structure and spacing between the plurality of doped regions is smaller than about 5 microns.
A semiconductor structure, comprising:
- a polycrystalline semiconductor layer containing crystalline grains separated by grain boundaries;
- and
- a plurality of conductive regions, within said semiconductor structure, which connect grains across said grain boundaries, wherein the plurality of conductive regions span an entire width of the polycrystalline semiconductor layer and spacing between the plurality of conductive regions is smaller than about 5 microns.
A method of operating a thin film transistor, comprising the actions of:
- controlling the flow of carriers between first and second source/drain regions, through a polycrystalline semiconducting region, using a control terminal;
- and
- equalizing the voltage across the width of the semiconducting region, at multiple points along the length thereof, using conductive zones which are not otherwise connected to said source/drain regions, wherein the conductive zones span the width of the semiconducting region and spacing between the conductive zones is smaller than about 5 microns.
A method of operating a thin film transistor, comprising the actions of:
- controlling the flow of carriers between source and drain regions, through a polycrystalline semiconducting region which includes grains separated by grain boundaries which include traps, using a control terminal;
- and
- equalizing the current average density across the width of the semiconducting region, at multiple points along the length thereof, using conductive zones which are not otherwise connected to said source nor to said drain, wherein the conductive zones span the width of the semiconducting region and spacing between the conductive zones is smaller than about 5 microns.
A method of forming a polycrystalline thin film semiconductor, comprising the steps of:
- forming a polycrystalline thin film;
- and
- fabricating multiple conductive lines across said film positioned across a desired current flow with the conductive lines substantially parallel to each other and less than 10 micron wide, wherein the multiple conductive lines span an entire width of the polycrystalline thin film and spacing between the multiple conductive lines is smaller than about 5 microns;
- and
- thereafter forming a control terminal which overlies and is insulated from multiple ones of said conductive lines.
2 more elements
A method of forming thin film transistors, comprising the steps of:
- forming a semiconducting thin film on a nonconducting substrate;
- and
- doping one or more crosswise regions in the semiconducting thin film to form alternating lines of high resistance semiconducting thin film and low resistance semiconducting film, wherein spacing between the lines of low resistance is smaller than about 5 microns.
A method of forming thin film transistors, comprising the steps of:
- forming a semiconducting thin film on a nonconducting substrate;
- and
- doping one or more crosswise regions in the semiconducting thin film using a large area grating manufacturing technique or an e-beam direct writing machine to pattern the semiconducting thin film with doped crosswise regions to form an active area, current flowing across each of said crosswise regions, wherein spacing between the crosswise regions is smaller than about 5 microns.
A method of forming thin film transistors, comprising the steps of:
- fabricating an active area of semiconducting materials by photolithography to form a thin-film channel on a nonconducting substrate;
- doping plurality of crosswise regions of the active area, to form low resistance regions bordered by high resistance regions, where the direction of current flow is transverse to the crosswise regions, wherein the crosswise regions span an entire width of the active area and spacing between the crosswise regions is smaller than about 5 microns;
- depositing an insulating layer on the active area to form an active channel.
A method of forming thin film transistors, comprising the steps of:
- fabricating an active area of semiconducting materials by photolithography in the form of a thin-film channel on a nonconducting substrate;
- doping the two ends of the active area to form a source and drain;
- and
- doping plurality of crosswise regions of the active area with the same dopants, wherein the crosswise regions are positioned across the direction of primary current flow, and the doping of the source and drain and crosswise regions is performed in the same photolithographic step, wherein the crosswise regions span an entire width of the active area and spacing between the crosswise regions is smaller than about 5 microns;
- and
- fabricating a gate electrode which is insulated from the thin film channel and covers essentially the entire region including the doped regions and the original regions between the source and drain regions.
3 more elements
A method of forming thin film transistors, comprising the steps of:
- forming a pattern to make a gate on a nonconducting substrate;
- depositing an insulating layer on the gate;
- forming a semiconducting thin film on the insulating layer;
- and
- doping plurality of crosswise regions in the semiconducting thin film, wherein the crosswise regions span an entire width of the semiconducting thin film and spacing between the crosswise regions is smaller than about 5 microns.
2 more elements
A method of forming thin film transistors, comprising the steps of:
- forming and patterning a gate on a nonconducting substrate;
- depositing an insulating layer on the gate;
- and
- forming a semiconducting thin film on the insulating layer by doping one or more crosswise regions in the semiconducting thin film and
- patterning the semiconducting thin film with the doped crosswise regions to form an active area with the crosswise regions crossing the direction of current flow, wherein the crosswise regions span an entire width of the semiconducting thin film and spacing between the crosswise regions is smaller than about 5 microns.
2 more elements
A method of forming thin film transistors, comprising the steps of:
- forming and patterning firstly a gate of the thin film transistor on a nonconducting substrate;
- depositing an insulating layer on the gate;
- forming a semiconducting thin film on the insulating layer;
- patterning an active area of semiconducting materials by photolithography to form of a thin-film channel on the insulating layer;
- and
- doping plurality of crosswise regions of the active area, wherein current flows across the crosswise regions between a source and drain, wherein the crosswise regions span an entire width of the semiconducting thin film and spacing between the crosswise regions is smaller than about 5 microns.
3 more elements
Dependencies are inferred from the claim text.