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US 8,418,128 B2Granted
Graphical language compiler system
AssigneeHoneywell International Inc.
InventorsMichael A. Pouchak, Gary A. Smith
Life of this patent
Estimating the term…
Abstract
A system having a graphical compiler connected to a function block engine. The graphical compiler may convert graphical information to non-graphical information. A resources allocation module may be connected to the function block engine and the compiler. Also, a function block execution list may be connected to the compiler and the function block engine. A user interface may be connected to the compiler.
Claims19
A control system language compiler method comprising:
- loading control functions into a memory associated with the control system language compiler;
- initiating a control loop design structure;
- and
- instantiating the control loop design structure;
- and
- configuring a circuit or structure designed using the control loop design structure to operate using a function block engine to execute a function block execution list as a list of references to functions and/or data, wherein the function block engine operates within a specified amount of memory allocated in the memory of a controller;
- entering a configuration mode of the control loop design structure for designing a circuit or structure;
- designing a circuit or structure which includes dragging function and/or non-function blocks onto a display screen;
- and
- connecting the function and/or non-function blocks to effect a design of the circuit or structure.
7 more elements
A system comprising:
- a controller having a fixed amount memory and comprising a function block engine;
- and
- a computer comprising a graphical compiler module, the graphical compiler module configured to output a function block execution list used by the function block engine;
- and
- wherein:
- the function block execution list includes a listing of one or more references to function blocks and an order of execution of the function blocks by the function block engine;
- entering a configuration mode of the control loop design structure is for designing a circuit or structure;
- designing a circuit or structure includes dragging function and/or non-function blocks onto a display screen;
- and
- connecting the function and/or non-function blocks effects a design of the circuit or structure.
7 more elements
A method comprising:
- initiating a graphical compiler module structure;
- configuring function blocks, parameters, interconnects for the graphical compiler module;
- activating a memory resource module;
- and
- generating configuration information for the function blocks;
- generating a function block execution list from the configured graphical compiler module;
- executing the function block execution list by a function block engine using the configuration information within a specified amount of memory allocated in random access memory (RAM) of an embedded controller;
- entering a configuration mode of the control loop design structure for designing a circuit or structure;
- designing a circuit or structure which includes dragging function and/or non-function blocks onto a display screen;
- and
- connecting the function and/or non-function blocks to effect a design of the circuit or structure.
8 more elements
Dependencies are inferred from the claim text.