Digital phase comparator
AssigneeNEC Corporation
InventorTakashi Tokairin
Life of this patent
Estimating the term…
Abstract
A digital phase comparator is provided in which first phase difference signals and second phase difference signals are used as digital phase difference information. The first phase difference signals are generated by sampling a second clock signal with a first group of clock signals having regular intervals. The second phase difference signals are generated, using a second group of clock signals and a first group of signals which are obtained by delaying a second clock signal and a first signal generated by performing a logic operation on the first phase difference signal respectively at different regular intervals, by sampling the second group of clock signals with the first group of signals.
Claims20
A digital phase comparator comprising:
- a first circuit unit including a first delay element array delaying a first clock signal at regular intervals, and a first group of data holding circuits generating and producing first phase difference signals obtained by sampling a second clock signal with the use of the first clock signal and a first group of delayed signals obtained by delaying the first clock signal with the first delay element array;
- a second circuit unit generating a first signal by performing a logic operation on the first phase difference signals;
- and
- a third circuit unit including a second delay element array delaying the second clock signal at first regular intervals, and a third delay element array delaying the first signal at second regular intervals, and further including a second group of data holding circuits generating and producing second phase difference signals obtained by sampling a second group of delayed signals obtained by delaying the second clock signal with the second delay element array, with the uses of a third group of delayed signals obtained by delaying the first signal with the third delay element array,
- wherein the first phase difference signals and the second phase difference signals are digital phase difference information indicating a phase difference between the first clock signal and the second clock signal.
A method of detecting a phase difference in a digital phase comparator, comprising:
- sampling a second clock signal with the use of a first group of clock signals obtained by delaying a first clock signal at regular intervals and the first clock signal, and holding the sampled signals as first phase difference signals in a first group of data holding circuits;
- generating a first signal by performing a logic operation on the first phase difference signals;
- delaying the second clock signal and the first signal by different delay times from each other at regular intervals, respectively, sampling a second group of clock signals obtained by delaying the second clock signal at the regular intervals with a first group of signals obtained by delaying the first signal at the regular intervals, and holding the sampled signals as second phase difference signals in a second group of data holding circuits.
Dependencies are inferred from the claim text.