Execution monitor for electronic design automation

A computer-program product for use in conjunction with a computer system, the computer-program product comprising a non-transitory computer-readable storage medium and a computer-program mechanism embedded therein for configuring the computer system to monitor execution of a user-configurable electronic design automation (EDA) flow, comprising:

• instructions for providing first signals to display an EDA flow-control environment on a display, wherein the flow-control environment includes an execution-monitoring window;
• instructions for initiating, based on a first user input, the user-configurable EDA flow, which is displayed as a top-level sequence of blocks, wherein a block in the sequence of blocks comprises a user-configurable collection of sub-block flows, wherein a sub-block in a sub-block flow represents a sequence of EDA tasks that are performed on the circuit design;
• instructions for receiving, from the user, modifications to one or more blocks or sub-blocks at any level of a hierarchy of blocks and sub-blocks;
• instructions for monitoring execution of the user-configurable EDA flow tasks, wherein the EDA flow tasks result in a realization of an integrated chip design product idea, and wherein the EDA flow tasks comprise logic design, functional verification, synthesis, top-level routing, and timing analysis;
• and
• instructions for displaying, based on a second user input, execution status information and progress in execution of the blocks and the sub-blocks at a desired level of the hierarchy of blocks and associated sub-blocks, wherein the displayed execution status information and progress in execution reflects the received modifications from the user.

A computer system, comprising:

• a processor;
• memory;
• a program module, wherein the program module is stored in the memory and configured to be executed by the processor to monitor execution of a user-configurable electronic design automation (EDA) flow, the program module including:
• instructions for providing first signals to display an EDA flow-control environment on a display, wherein the flow-control environment includes an execution-monitoring window;
• instructions for initiating, based on a first user input, the user-configurable EDA flow, which is displayed as a top-level sequence of blocks, wherein a block in the sequence of blocks comprises a user-configurable collection of sub-block flows, wherein a sub-block in a sub-block flow represents a sequence of EDA tasks that are performed on the circuit design;
• instructions for receiving, from the user, modifications to one or more blocks or sub-blocks at any level of a hierarchy of blocks and sub-blocks;
• instructions for monitoring execution of the user-configurable EDA flow tasks, wherein the EDA flow tasks result in a realization of an integrated chip design product idea, and wherein the EDA flow tasks comprise logic design, functional verification, synthesis, top-level routing, and timing analysis;
• and
• instructions for displaying, based on a second user input, execution status information and progress in execution of the blocks and the sub-blocks at a desired level of the hierarchy of blocks and associated sub-blocks, wherein the displayed execution status information and progress in execution reflects the received modifications from the use.

A non-transitory computer-readable storage medium storing instructions for a graphical user interface on a computer, the instructions comprising:

• instructions for displaying the graphical user interface in a flow-control environment, wherein the graphical user interface is configured to monitor execution of a user-configurable electronic design automation (EDA) flow comprising a top-level sequence of blocks, wherein the user-configurable EDA flow comprises a user-configurable collection of sub-block flows, wherein a sub-block in a sub-block flow represents a sequence of EDA tasks that result in a realization of an integrated chip design product idea, and wherein the EDA flow tasks comprise logic design, functional verification, synthesis, top-level routing, and timing analysis;
• and
• instructions for displaying an execution-monitoring window in the graphical user interface, wherein the execution-monitoring window is configured to display a graphical representation of a sequence of blocks in the user-configurable EDA flow and, based at least in part on monitoring of execution of the user-configurable EDA flow, and to display graphical execution status information and progress during execution of the user-configurable EDA flow, wherein the displayed execution status information and progress in execution reflects modifications received from the user to one or more blocks or sub-blocks at any level of a hierarchy of blocks and sub-blocks.