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US 8,413,024 B2Granted
Performing a cyclic redundancy checksum operation responsive to a user-level instruction
AssigneeIntel Corporation
InventorsSteven R. King, Frank Berry, Michael E. Kounavis
Life of this patent
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Abstract
In one embodiment, the present invention includes a method for receiving incoming data in a processor and performing a checksum operation on the incoming data in the processor pursuant to a user-level instruction for the checksum operation. For example, a cyclic redundancy checksum may be computed in the processor itself responsive to the user-level instruction. Other embodiments are described and claimed.
Claims1
A processor comprising:
- logic to perform a user-level instruction, wherein the logic is to perform at least one exclusive-OR operation on data of one of a variable number of data sizes responsive to the user-level instruction.
Dependencies are inferred from the claim text.