Systems and methods for retimed virtual data processing
AssigneeLSI Corporation
InventorsJinfeng Liu, Hongwei Song
Life of this patent
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Abstract
Various embodiments of the present invention provide systems and methods for data processing system. As one example, a data processing circuit is described that includes an analog to digital converter, an online timing loop, and an offline timing loop. The analog to digital converter receives an analog input and provides a first series of data samples Each bit of the first series of data samples corresponds to the analog input at a time controlled by an updated sampling clock. The online timing loop modifies the updated sampling clock based at least in part upon a processed version of the first series of data samples.
Claims21
A data processing system, the system comprising:
- an analog to digital converter operable to receive an analog input and to provide a first series of data samples, wherein each bit of the first series of data samples corresponds to the analog input at a time controlled by an updated sampling clock;
- an online timing loop operable to modify the updated sampling clock based at least in part upon a processed version of the first series of data samples;
- and
- an offline timing loop operable to interpolate a derivative of the first series of data samples to yield a second series of data samples, wherein the second series of data samples mimics a series of data samples corresponding to the analog input that were sampled using a free running clock;
- and wherein the second series of data samples is interpolated to adjust each bit in accordance with an average frequency offset exhibited across the second series of data samples.
A data processing system, the system comprising:
- an online timing loop operable to modify an updated sampling clock based at least in part upon a processed version of a first series of data samples;
- and
- an offline timing loop operable to interpolate a data set derived from the first series of data samples to yield a second series of data samples, wherein the second series of data samples mimics a series of data samples corresponding to an analog input that were sampled using a free running clock;
- and wherein the second series of data samples is interpolated to adjust each bit in accordance with an average frequency offset exhibited across the second series of data samples.
Dependencies are inferred from the claim text.