Method and apparatus for reducing power consumption for memories

An apparatus comprising:

• a counter to generate a value corresponding to power states of each memory of a plurality of memories;
• a first logic unit to compute a power state usage corresponding to power states of each memory of the plurality, the computing based on the counter value, wherein the power state usage indicates a number of times each memory of the plurality remains in a power state and a number of times each memory enters or exits a particular power state;
• a second logic unit to determine when the power state usage exceeds a predetermined threshold usage;
• and
• a third logic unit to adjust current and future usage of each memory of the plurality in response to the second logic unit determining that the power state usage exceeds the predetermined threshold.

A system comprising

• a memory having a plurality of memory modules;
• and
• a memory controller coupled to the memory and comprising:
• a counter to generate a value corresponding to power states of each memory module of the plurality of memory modules;
• a first logic unit to compute a power state usage corresponding to power states of each memory module of the plurality, the computing based on the counter value, wherein the power state usage indicates a number of times each memory of the plurality remains in a power state and a number of times each memory enters or exits a particular power state;
• a second logic unit to determine when the power state usage exceeds a predetermined threshold usage;
• and
• a third logic unit to adjust current and future usage of each memory module of the plurality in response to the second logic unit determining that the power state usage exceeds the predetermined threshold.