Apparatus, system and method for configuration of adaptive integrated circuitry having heterogeneous computational elements
AssigneeAltera Corporation
InventorsPaul L. Master, Stephen J. Smith, John Watson
Life of this patent
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AssigneeAltera Corporation
InventorsPaul L. Master, Stephen J. Smith, John Watson
Estimating the term…
The present invention concerns configuration of a new category of integrated circuitry for adaptive or reconfigurable computing. The preferred adaptive computing engine (ACE) IC includes a plurality of heterogeneous computational elements coupled to an interconnection network. The plurality of heterogeneous computational elements include corresponding computational elements having fixed and differing architectures, such as fixed architectures for different functions such as memory, addition, multiplication, complex multiplication, subtraction, configuration, reconfiguration, control, input, output, and field programmability. In response to configuration information, the interconnection network is operative to configure and reconfigure the plurality of heterogeneous computational elements for a plurality of different functional modes, including linear algorithmic operations, non-linear algorithmic operations, finite state machine operations, controller operations, memory operations, and bit-level manipulations. The preferred system embodiment includes an ACE integrated circuit coupled with the configuration information needed to provide an operating mode. Preferred methodologies include various means to generate and provide configuration information for various operating modes.
A system for adaptive configuration, the system comprising:
A system for adaptive configuration, the system comprising:
A method for adaptive configuration of an integrated circuit, the method comprising:
A method for adaptive configuration of an integrated circuit, the integrated circuit having a first plurality of heterogeneous computational elements, a second plurality of heterogeneous computational elements, and an interconnection network coupled to the memory, the interconnection network having and a second interconnection network configurably coupling the second plurality of heterogeneous computational elements together, the method comprising:
Dependencies are inferred from the claim text.