Macroscalar processor architecture
AssigneeApple Inc.
InventorJeffry E. Gonion
Life of this patent
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Abstract
A method for aggregating a program loop in a Macroscalar architecture includes identifying one or more instructions of the program loop having a branch instruction that causes the program loop to branch dependent upon a predicate condition after a memory write operation. The method also includes modifying at least one of the one or more instructions to cause a processor executing the one or more instructions to branch after the memory write operation executed as a vector block for iterations prior to and including an iteration during which the predicate condition is satisfied.
Claims11
A method for aggregating a program loop, the method comprising:
- performing by a processor:
- identifying one or more instructions of a program loop having a branch instruction that causes the program loop to branch after a memory write operation dependent upon a predicate condition, wherein the predicate condition controls whether the branch instruction is dispatched for execution;
- and
- modifying the one or more instructions to cause a processor to execute the one or more instructions as a vector block, and to branch after the memory write operation is executed, for iterations of the program loop prior to and including an iteration during which the predicate condition is satisfied.
An apparatus for aggregating a program loop, comprising:
- means for identifying one or more instructions of a program loop having a branch instruction that causes the program loop to branch after a memory write operation dependent upon a predicate condition, wherein the predicate condition controls whether the branch instruction is dispatched for execution;
- and
- means for modifying the one or more instructions to cause a processor to execute the one or more instructions as a vector block, and to branch after the memory write operation is executed, for iterations of the program loop prior to and including an iteration during which the predicate condition is satisfied.
A non-transitory computer readable storage medium including instructions executable by a processor to:
- identify a program loop having a branch instruction that causes another processor executing the program loop to branch after executing a memory write operation dependent upon a predicate condition, wherein the predicate condition controls whether the branch instruction is dispatched for execution;
- and
- modify the program loop to cause the another processor to execute the program loop as a vector block, and to cause the processor to branch after the memory write operation is executed, for iterations of the program loop prior to and including an iteration during which the predicate condition is satisfied.
Dependencies are inferred from the claim text.