Arbitrated access to memory shared by a processor and a data flow

A memory access arbitration method for allowing a shared memory to be used both as a buffer for data flows and as a main memory for a processor, in an information apparatus including a memory, a plurality of functional blocks each of which handles a data flow from and to the memory, and a processor which uses the memory as a main memory, the method comprising:

• making assignment for access requests to the memory from the plurality of functional blocks in units of predetermined transfer lengths sequentially in a round-robin fashion,
• dividing each of data transfers from the functional blocks into transfer blocks of a predetermined transfer length (transfer block length), and transferring the transfer blocks in one round-robin cycle in accordance with bandwidths required for the data transfers from the functional blocks,
• setting a priority of each of the plurality of transfer blocks of the data transfers in a programmable way so that the transfer blocks from the functional blocks have different priorities and that the bandwidths required for the data transfers from all the functional blocks are met by alternate transfer of the transfer blocks from the different functional blocks, and
• executing an access from the processor with an upper limit set for the number of access times from the processor to the memory in one round-robin cycle so that the access from the processor with the highest priority and with a predetermined transfer length (processor transfer length) exerts less effect on bandwidths for data flow transfers from the functional blocks in predetermined intervals between the transfer blocks.

A memory access arbitration computer program product for allowing a shared memory to be used both as a buffer for data flows and as a main memory for a processor, in an information apparatus including:

• a memory;
• a plurality of functional blocks each of which handles a data flow from and to the memory;
• and a processor which uses the memory as a main memory, the computer program product comprising computer program instructions, disposed upon a recordable, computer-readable storage medium, that when executed cause the processor to function by:
• making assignment for access requests to the memory from the plurality of functional blocks in units of predetermined transfer lengths sequentially in a round-robin fashion,
• dividing each of data transfers from the functional blocks into transfer blocks of a predetermined transfer length (transfer block length), and transferring the transfer blocks in one round-robin cycle in accordance with bandwidths required for the data transfers from the functional blocks,
• setting a priority of each of the plurality of transfer blocks of the data transfers in a programmable way so that the transfer blocks from the functional blocks have different priorities and that the bandwidths required for the data transfers from all the functional blocks are met by alternate transfer of the transfer blocks from the different functional blocks, and
• executing an access from the processor with an upper limit set for the number of access times from the processor to the memory in one round-robin cycle so that the access from the processor with the highest priority and with a predetermined transfer length (processor transfer length) exerts less effect on bandwidths for data flow transfers from the functional blocks in predetermined intervals between the transfer blocks.