US 8,412,882 B2 · Leveraging chip variability

Abstract

Embodiments are described that leverage variability of a chip. Different areas of a chip vary in terms of reliability under a same operating condition. The variability may be captured by measuring errors over different areas of the chip. A physical factor that affects or controls the likelihood of an error on the chip can be varied. For example, the voltage supplied to a chip may be provided at different levels. At each level of the physical factor, the chip is tested for errors within the regions. Some indication of the error statistics for the regions is stored and then used to adjust power used by the chip, to adjust reliability behavior of the chip, to allow applications to control how the chip is used, to compute a signature uniquely identifying the chip, etc.

Claims14

Dependent claims

A method of obtaining an error profile for a chip, the method comprising:

measuring error statistics for respective regions of a chip over a range of values of a physical characteristic of the chip, the error statistics comprising, for each region, an error statistic for each value in the range of values, such that for each value there is a corresponding measured error statistic for each region, wherein the error statistics are able to map, at a given time, for each region, varying values of the physical characteristic to respective error statistics, where for any given one of the regions and any given one of the varying values, the error statistics are able to provide, at the given time, a corresponding error statistic that is specific to the given one of the regions and is specific to the given one of the varying values;
storing indicia of the error statistics;
and
using the indicia of the error statistics to control operation of the chip.

1 more element

Dependencies are inferred from the claim text.

Leveraging chip variability

Life of this patent

Leveraging chip variability

Life of this patent

Abstract

Claims14