Memory power estimation by means of calibrated weights and activity counters
AssigneeIntel Corporation
InventorsHoward S. David, Eugene Gorbatov, Ulf R. Hanebutte, Minh Le, Rahul Khanna
Life of this patent
Estimating the term…
Abstract
Memory power estimation by means of calibrated weights and activity counters are generally presented. In this regard, in one embodiment, a memory power is introduced to read a value from a memory activity counter, to determine a memory power estimation based at least in part on the value and a calibration, and to store the memory power estimation to a register. Other embodiments are also described and claimed.
Claims10
A storage medium comprising content which, when executed by an accessing machine, causes the accessing machine to:
- read a value from a memory activity counter;
- determine a memory power estimation based at least in part on the value and a calibration;
- store the memory power estimation to a register;
- and
- determine the calibration based on an execution of a memory access test pattern comprising receiving a current measurement from a voltage regulator across various memory loadings to determine specific characteristics of the voltage regulator.
A system comprising:
- a processor including a memory controller and a memory activity counter;
- a dynamic random access memory (DRAM) coupled to the processor;
- and
- a memory power agent, the memory power agent to read a value from the memory activity counter, the memory power agent to determine a memory power estimation based at least in part on the value and a calibration, and the memory power agent to store the memory power estimation to a register, the memory power agent to determine the calibration based on an execution of a memory access test pattern, the memory power agent to receive a plurality of current measurements from a voltage regulator across various memory loadings to determine specific characteristics of the voltage regulator.
A method for estimating a memory power consumption in a computing system comprising:
- determining a calibration based on an execution of a memory access test pattern;
- reading a value from a memory activity counter;
- computing a memory power estimation based at least in part on the value and a calibration;
- and
- storing the memory power estimation to a register;
- wherein determining the calibration based on the execution of a memory access test pattern comprises receiving a current measurement from a voltage regulator, wherein receiving a current measurement from a voltage regulator comprises receiving a plurality of current measurements from a voltage regulator across various memory loadings to determine specific characteristics of the voltage regulator.
Dependencies are inferred from the claim text.