Method and arrangement for digital measuring a capacitive sensor

Arrangement for Digital Measuring a Capacitive Sensor comprising:

• a. an operational amplifier with an integration capacitor CI connected between an output and an inverting input of the amplifier, the output is further connected to an input of a clocked comparator, which controls a gate circuit and a positive input of the operational amplifier is connected to an analog ground potential;
• b. two switched capacitors CR and CS, wherein
• i. capacitor CR is connected on one side with a negative reference voltage and on the other side with a switch S2, which, controlled by a pulse rate Z, connects capacitor CR either with a positive reference voltage or with the inverting input of the amplifier,
• ii. capacitor CS is connected on one side with a switch S1, which, controlled by a clock, connects capacitor CS either with the inverting input or with a negative reference voltage, the other side of capacitor CS is connected with the capacitive sensor and with a switch S0, which, controlled by the clock, connects an interconnect point of capacitive sensor either with the negative reference voltage or capacitor CS, and the second side of the capacitive sensor is connected with the negative reference voltage;
• and
• c. wherein a real capacitance and the value of a shunt resistor of the capacitive sensor are calculated based upon gated clock pulses output by the gated circuit at a first clock frequency and a second clock frequency, respectively.