Parallel generation and matching of a deskew channel

A method comprising:

• in an entirely digital CMOS circuit:
• receiving at a stream frequency, a plurality n input data bits in parallel from each of a plurality of m parallel data channels, the plurality of n parallel input data bits having a stream frequency that is 1/n of a data channel frequency, the n xm input data bits from all the data channels arriving at the stream frequency collectively forming an input data word, the plurality of m parallel data channels having delays relative to each other in integer multiples of a channel clock period;
• receiving at a stream frequency, n deskew channel bits in parallel from a deskew channel, the stream frequency being 1/n of the deskew channel frequency, the deskew channel consisting of frames, each of the frames comprising x processed or unprocessed input data bits from the data channels, each of the frames further comprising one or more framing bits, the deskew channel having delays relative to each of the m data channels in integer multiples of the channel clock period;
• determining frame boundaries by searching the n parallel deskew channel bits for the framing bits;
• mapping the data bits in each frame to the individual data channels based on the determined frame boundaries;
• comparing, in parallel, the x×y data bits from y frames within the parallel deskew channel to the input data bits in one or more input data words;
• and
• determining the relative delays between the plurality of m parallel data channels and the deskew channel.

A circuit comprising:

• a deskew generator block configured to:
• receive a plurality of input data bits at a collective data rate, the plurality of input data bits being grouped into a plurality of input data words, the plurality of input data bits of each of the input data words being received from a plurality of n parallel input-data-bit streams that are different, from each other, each of the plurality of n parallel input-data-bit streams having a stream data rate that is 1/n of the collective data rate, each of the input data words comprising n consecutive ones of the plurality of input data bits;
• select particular input data bits from the plurality of parallel input-data-bit streams;
• and
• generate a k-bit deskew channel with the selected input data bits in parallel with the plurality of input-data-bit streams, the deskew channel comprising a number of frames, each of the frames comprising x input data bits from one or more input data words, each of the frames further comprising one or more framing bits.

A circuit comprising:

• a deskew block configured to:
• receive at a stream frequency, a plurality of n input data bits in parallel from each of a plurality of m parallel data channels, the plurality of n parallel input data bits having a stream frequency that is 1/n of a data channel frequency, the n×m input data bits from all the data channels arriving at the stream frequency collectively forming an input data word, the plurality of m parallel data channels having delays relative to each other in integer multiples of a channel clock period;
• receive at a stream frequency, n deskew channel bits in parallel from a deskew channel, the stream frequency being 1/n of the deskew channel frequency, the deskew channel consisting of frames, each of the frames comprising x processed or unprocessed input data bits from the data channels, each of the frames further comprising one or more framing bits, the deskew channel having delays relative to each of the m data channels in integer multiples of the channel clock period;
• determine frame boundaries by searching the n parallel deskew channel bits for the framing bits;
• map the data bits in each frame to the individual data channels based on the determined frame boundaries;
• compare, in parallel, the x×y data bits from y frames within the parallel deskew channel to the input data bits in one or more input data words;
• and
• determine the relative delays between the plurality of m parallel data channels and the deskew channel.

A system comprising:

• means for receiving a plurality of input data bits at a collective data rate, the plurality of input data bits being grouped into a plurality of input data words, the plurality of input data bits of each of the input data words being received from a plurality of n parallel input-data-bit streams that are different from each other, each of the plurality of n parallel input-data-bit streams having a stream data rate that is 1/n of the collective data rate, each of the input data words comprising n consecutive ones of the plurality of input data bits;
• means for selecting particular input data bits from the plurality of parallel input-data-bit streams;
• and
• means for generating a k-bit deskew channel with the selected input data bits in parallel with the plurality of input-data-bit streams, the deskew channel comprising a number of frames, each of the frames comprising x input data bits from one or more input data words, each of the frames further comprising one or more framing bits.

A system comprising:

• means for receiving at a stream frequency, a plurality of n input data bits in parallel from each of a plurality of m parallel data channels, the plurality of n parallel input data bits having a stream frequency that is 1/n of a data channel frequency, the n×m input data bits from all the data channels arriving at the stream frequency collectively forming an input data word, the plurality of m parallel data channels having delays relative to each other in integer multiples of a channel clock period;
• means for receiving at a stream frequency, n deskew channel bits in parallel from a deskew channel, the stream frequency being 1/n of the deskew channel frequency, the deskew channel consisting of frames, each of the frames comprising x processed or unprocessed input data bits from the data channels, each of the frames further comprising one or more framing bits, the deskew channel having delays relative to each of the m data channels in integer multiples of the channel clock period;
• means for determining frame boundaries by searching the n parallel deskew channel bits for the framing bits;
• means for mapping the data bits in each frame to the individual data channels based on the determined frame boundaries;
• means for comparing, in parallel, the x×y data bits from y frames within the parallel deskew channel to the input data bits in one or more input data words;
• and
• means for determining the relative delays between the plurality of m parallel data channels and the deskew channel.