Low power, high speed multi-channel data acquisition system and method

A method of data acquisition, comprising:

• multiplexing a first of various input signals in accordance with a multiplexer address signal to generate a corresponding first value of a multiplexer output signal;
• amplifying the first value of the multiplexer output signal to produce a first value of an amplified signal;
• powering up at least a portion of a digitizing circuit for analog to digital conversion operation in response to a power control signal the powering up causes a power-up glitch to be superimposed on the amplified signal;
• beginning sampling and holding of the first value of the amplified signal;
• providing a predetermined amount of time between the power-up glitch and a beginning of an analog to digital conversion of the first value of the amplified signal by the digitizing circuit to a digital representation thereof, to allow settling of the power-up glitch before completing the sampling and holding of the first value of the amplified signal;
• multiplexing a second of the input signals so as to cause it to be amplified to a second value of the amplified signal after a beginning of the conversion of the first value of the amplified signal by the digitizing circuit;
• operating the digitizing circuit to convert the first value of the amplified signal to the digital representation during settling of the second value of the amplified signal;
• and
• powering down the portion of the digitizing circuit at the end of the conversion of the first value of the amplified signal, to reduce power consumption.

A data acquisition system, comprising:

• means for multiplexing a first of various input signals in accordance with a multiplexer address signal to generate a corresponding first value of a multiplexer output signal;
• means for amplifying the first value of the multiplexer output signal to produce a first value of an amplified signal;
• means for operating a digitizing circuit to begin sampling of the first value of the amplified signal;
• means for powering up a portion of the digitizing circuit for analog to digital conversion operation in response to a power control signal, wherein the powering up of the digitizing circuit causes a power-up glitch on an input of the digitizing circuit;
• means for providing a predetermined amount of time between the power-up glitch and a beginning of conversion of the first value of the amplified signal by the digitizing circuit, to allow settling of the power-up glitch;
• means for multiplexing a second of the input signals so as to cause it to be amplified to a second value of the amplified signal after the beginning of a conversion of the first value of the amplified signal to a digital representation thereof by the digitizing circuit;
• means for operating the digitizing circuit to convert the first value of the amplified signal to the digital representation during settling of the second value of the amplified signal;
• and
• means for powering down the portion of the digitizing circuit at the end of the conversion of the first value of the amplified signal, to reduce power consumption.