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US 8,411,676 B2Granted
Reconfigurable compute engine interconnect fabric
AssigneeWisterium Development LLC
InventorsMatthew J. Thiele, Robert P. Boland, Peter O. Luthi
Life of this patent
Estimating the term…
Abstract
A reconfigurable compute engine interconnect fabric includes a reconfigurable interconnect layer (24, FIG. 2) between an application layer (22) and a physical layer (26) which identifies the input and output pins for the engine and their functions.
Claims14
An apparatus comprising:
- a reconfigurable compute engine comprising an application layer and a physical layer;
- and
- an interconnect fabric in communication with the application layer and the physical layer;
- wherein the interconnect fabric is configured to redefine interconnects with a second reconfigurable compute engine wherein a redefined interconnect comprises a new function of the reconfigurable compute engine without modification of the physical layer and the application layer;
- and
- wherein the interconnect fabric is configured to dynamically activate and deactivate one or more pins on the reconfigurable compute engine, which is communicatively coupled by the interconnect fabric, based on an instruction from the reconfigurable compute engine.
3 more elements
A system comprising:
- a first reconfigurable compute engine (RCE);
- a second RCE;
- an interconnect fabric configured to dynamically activate and de-activate one or more pins on at least one of the first RCE and the second RCE, which are communicatively coupled by the interconnect, based on an instruction from at least one of the first RCE and the second RCE;
- and
- an interconnection of the first RCE and the second RCE through the interconnect fabric;
- wherein the interconnect fabric is configured to be reprogrammable to redefine the interconnection wherein a redefined interconnect defines a new function of the first and second RCE without modification of corresponding physical layers and application layers of the first RCE and the second RCE.
3 more elements
A method comprising:
- receiving an instruction by an interconnect layer from at least one of a first reconfigurable compute engine (RCE) and a second RCE, wherein the first RCE and the second RCE are communicatively coupled by the interconnect layer;
- dynamically activating and de-activating, by the interconnect layer, one or more pins on the at least one of the first RCE and the second RCE in response to the instruction;
- interconnecting inputs and outputs of the interconnect layer to accommodate a new application loaded on at least one of the first and second RCE;
- and
- performing the new application without reconfiguring a physical layer and without modification of an application layer of the first and second RCE.
2 more elements
Dependencies are inferred from the claim text.