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US 8,411,508 B2Granted
Automatic selective slow program convergence
AssigneeMicron Technology, Inc.
InventorsPranav Kalavade, Krishna K. Parat, Paul D. Ruby
Life of this patent
Estimating the term…
Abstract
Apparatus, methods, and systems are disclosed, including those to improve program voltage distribution width using automatic selective slow program convergence (ASSPC). One such method may include determining whether a threshold voltage (Vt) associated with a memory cell has reached a particular pre-program verify voltage. In response to the determination, a voltage applied to a bit-line coupled to the memory cell may be automatically incremented at least twice as the program voltage is increased, until the cell is properly programmed. Additional embodiments are also described.
Claims23
A method, comprising:
- applying a program voltage to a memory including applying the program voltage to a word-line coupled to the memory cell;
- determining whether a threshold voltage associated with the memory cell has reached a particular pre-program verify voltage;
- and
- incrementing a voltage applied to a digit-line coupled to the memory cell at least twice responsive to determining that the threshold voltage has reached the particular pre-program verify voltage.
1 more element
A method, comprising:
- applying a program voltage to a memory;
- determining whether a threshold voltage associated with the memory cell has reached a particular pre-program verify voltage;
- and
- incrementing a voltage applied to a digit-line coupled to the memory cell at least twice responsive to determining that the threshold voltage has reached the particular pre-program verify voltage;
- and
- increasing the program voltage as an applied voltage to some other ones of the number of memory cells coupled to a word-line during an inhibit phase of the voltage applied to the digit-line of the memory cell.
3 more elements
A method, comprising:
- applying a program voltage to a memory;
- determining whether a threshold voltage associated with the memory cell has reached a particular pre-program verify voltage;
- and
- incrementing a voltage applied to a digit-line coupled to the memory cell at least twice responsive to determining that the threshold voltage has reached the particular pre-program verify voltage, wherein the incrementing further comprises incrementing the voltage applied to the digit-line in approximately similar step height value increments.
1 more element
A method, comprising:
- applying a program voltage to a memory;
- determining whether a threshold voltage associated with the memory cell has reached a particular pre-program verify voltage;
- incrementing a voltage applied to a digit-line coupled to the memory cell at least twice responsive to determining that the threshold voltage has reached the particular pre-program verify voltage;
- and
- increasing the voltage applied to the digit-line to an inhibit level after the threshold voltage associated with the memory cell has reached a selected program verify voltage.
2 more elements
An apparatus, comprising:
- an array of memory cells;
- and
- control circuitry coupled to the memory array to control programming of the memory cells, the control circuitry configured to implement a method, comprising:
- applying a program voltage to the array;
- determining whether a threshold voltage associated with a memory cell has reached a particular pre-program verify voltage;
- and
- incrementing a voltage applied to a digit-line coupled to the memory cell at least twice responsive to determining that the threshold voltage has reached the particular pre-program verify voltage.
4 more elements
A method, comprising:
- applying a program voltage to a word-line of multiple word-lines in an array of nonvolatile multi-level memory cells arranged in rows coupled to the word-lines and columns coupled to bit-lines, the program voltage applied to increase a threshold voltage associated with a memory cell coupled to the word-line;
- determining whether the threshold voltage has reached a particular pre-program verify voltage smaller than a program verify voltage;
- and
- incrementing a voltage applied to a bit-line of the BLs that is coupled to the memory cell until the threshold voltage reaches the program verify voltage and without determining whether the threshold voltage has reached a voltage between the particular pre-program verify and the program verify.
1 more element
A method, comprising:
- applying a number of program voltage pulses including a number of pulses having incrementally increasing pulse heights to a word-line of a number of word-lines of an array of memory cells in a flash memory device, the increasing pulse heights serving to increase a threshold voltage associated with memory cells coupled to the word-line;
- determining whether the threshold voltage has reached a pre-program verify voltage smaller than a program verify voltage, the program verify voltage comprising a voltage associated with the threshold voltage that corresponds to a stored state of the memory cell;
- incrementing at least twice within a single pre-program verify stage, a voltage applied to a bit-line coupled to the memory cell, responsive to the determining;
- verifying that the threshold voltage has reached the program verify voltage;
- and
- holding the voltage applied to the bit-line at an inhibit voltage responsive to reaching the program verify voltage.
3 more elements
Dependencies are inferred from the claim text.