Electrical lap guides and methods of using the same
AssigneeSeagate Technology LLC
InventorsJie Zou, Zhongyan Wang
Life of this patent
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Abstract
An electrical lap guide having a first layer, the first layer including a material having a first resistivity, the first layer having first and second contact regions for electrically connecting the electrical lap guide to electrical leads; a second layer, the second layer including a material having a second resistivity, wherein the electrical lapping guide has a lapping axis and a layered axis, the layered axis being perpendicular to the lapping axis, the electrical lapping guide has an air bearing plane, the air bearing plane being perpendicular to the lapping axis, the second layer is disposed adjacent to a portion of the first layer in the direction of the layered axis, and the first layer extends farther in the lapping axis than does the second layer.
Claims17
An electrical lap guide comprising:
- a first layer, the first layer comprising a first material having a first resistivity, the first layer having first and second contact regions configured to electrically connect the electrical lap guide to electrical leads;
- a second layer, the second layer comprising a second material having a second resistivity,
- wherein the electrical lap guide has a lapping axis and a layered axis, the layered axis being perpendicular to the lapping axis,
- the electrical lap guide has an air bearing plane, the air bearing plane being perpendicular to the lapping axis,
- the second layer is disposed adjacent to a portion of the first layer in the direction of the layered axis,
- the first layer extends farther in the lapping axis than does the second layer, and
- the second layer does not contact the air bearing plane of the electrical lap guide.
A pre-processed wafer having
- a lapping axis, a layered axis, and a wafer axis the three axes being orthogonal to one another;
- and an air bearing plane, the air bearing plane being parallel to the wafer axis and perpendicular to the lapping axis and the air bearing plane bisecting the pre-processed wafer, the pre-processed wafer comprising:
- at least one pre-processed feature;
- at least two electrical lap guides, each of the electrical lap guides comprising:
- a first layer, the first layer comprising a first material having a first resistivity, the first layer having first and second contact regions for electrically connecting the electrical lap guide to electrical leads;
- a second layer, the second layer comprising a second material having a second resistivity,
- the second layer is disposed adjacent to a portion of the first layer in the direction of the layered axis, and
- the first layer extends farther in the lapping axis than does the second layer,
- wherein the at least one pre-processed feature is disposed between the at least two electrical lap guides along the wafer axis, and
- wherein the pre-processed feature comprises the same material as the second layer.
A pre-processed wafer having
- a lapping axis, a layered axis, and a wafer axis the three axes being orthogonal to one another;
- and an air bearing plane, the air bearing plane being parallel to the wafer axis and perpendicular to the lapping axis and the air bearing plane bisecting the pre-processed wafer, the pre-processed wafer comprising:
- at least one pre-processed feature;
- at least two electrical lap guides, each of the electrical lap guides comprising:
- a first layer, the first layer comprising a material having a first resistivity, the first layer having first and second contact regions for electrically connecting the electrical lap guide to electrical leads;
- a second layer, the second layer comprising a material having a second resistivity,
- the second layer is disposed adjacent to a portion of the first layer in the direction of the layered axis, and the second layer does not contact the air bearing plane of the electrical lap guide, and
- the first layer extends farther in the lapping axis than does the second layer,
- wherein the at least one pre-processed feature is disposed between the at least two electrical lap guides along the wafer axis.
Dependencies are inferred from the claim text.