Active matrix substrate, liquid crystal panel, liquid crystal display unit, liquid crystal display device, television receiver, and active matrix substrate manufacturing method

A method for producing an active matrix substrate including a scanning signal line extending in a row direction, a data signal line extending in a column direction, a transistor connected with the scanning signal line and the data signal line, and a retention capacitor line,

• the method comprising the steps of:
• (i) forming, in each pixel region, a first pixel electrode, a second pixel electrode, a first capacitor electrode, and a second capacitor electrode in such a manner that (a) the first capacitor electrode and the second capacitor electrode are positioned on a layer where the data signal line is positioned, (b) the first capacitor electrode and the second capacitor electrode are aligned in the row direction to overlap the retention capacitor line via a first insulating film and to overlap the second pixel electrode via a second insulating film, (c) one conductive electrode of the transistor, the first pixel electrode, a first connection line connected with the first capacitor electrode, and a second connection line connected with the second capacitor electrode are electrically connected with one another, and (d) at least a part of the first connection line and at least a part of the second connection line do not overlap the retention capacitor line;
• and
• (ii) cutting the first connection line if a short-circuit between the first capacitor electrode and the data signal line occurs, and cutting the second connection line if a short-circuit between the second capacitor electrode and the data signal line occurs.

An active matrix substrate, comprising a scanning signal line, a transistor connected with the scanning signal line, and a retention capacitor line,

• each pixel region including a first pixel electrode, a second pixel electrode, a first capacitor electrode, a second capacitor electrode, and a connection line connecting the first capacitor electrode and the second capacitor electrode,
• the first capacitor electrode and the second capacitor electrode each overlapping the retention capacitor line via a first insulating film and overlapping the second pixel electrode via a second insulating film,
• one conductive electrode of the transistor being electrically connected with the connection line, and said one conductive electrode or the other conductive electrode of the transistor being electrically connected with the first pixel electrode, and
• at least a part of the connection line not overlapping the retention capacitor line.