Shader program instruction fetch

A graphics processing unit (GPU) for loading a shader program, said GPU comprising:

• an integrated circuit die comprising a plurality of stages of the GPU;
• a memory interface for interfacing with a graphics memory;
• and
• a host interface for interfacing with a computer system, and wherein the plurality of stages comprises a graphics pipeline configured to:
• access a shader program stored in the graphics memory;
• generate a shader instruction from the shader program;
• and
• load the shader instruction into an instruction table associated with one of the plurality of stages of the graphics pipeline at a position indicated by an offset register, wherein the shader instruction is loaded responsive to a program sequencer sending the shader instruction, and wherein the one of the plurality of stages of the graphics pipeline comprises the offset register.

A handheld computer system device, comprising:

• a system memory;
• a central processing unit (CPU) coupled to the system memory;
• and
• a graphics processing unit (GPU) communicatively coupled to the CPU, wherein the GPU comprises a graphics pipeline for executing a shader program, and wherein the graphics pipeline is configured to:
• access a shader program stored in the system memory;
• generate a shader instruction from the shader program;
• and
• load the shader instruction into an instruction table associated with one of a plurality of stages of the graphics pipeline at a position indicated by an offset register, wherein the shader instruction is loaded responsive to a program sequencer sending the shader instruction, and wherein the one of the plurality of stages of the graphics pipeline comprises the offset register.